• SOC Design - STA…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - STA Engineer to continue to innovate on behalf of our ... STA and Signoff for a complex, multi-clock, multi-voltage SoC . * Streamlining the timing signoff criterions, timing analysis...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. *… more
    Amazon (08/01/25)
    - Related Jobs

  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …tests in C for custom hardware 5. Help create and maintain design documentation including IP/ SoC Micro Architecture document (collaborator/owner), IP/ SoC ... with Digital Verification (DV) 3. Support back end physical design (PD) through STA and SDCs 4....practical experience 7. 6+ years of experience in digital design , hardware engineering or related experience 8.… more
    Meta (09/09/25)
    - Related Jobs

  • Technical Lead Manager, ASIC Design…

    Google (Sunnyvale, CA)
    …of ASIC Verification, Design For Testing (DFT), Synthesis, Static Timing Analysis ( STA ), or Physical Design . **About the job** In this role, you'll work ... Technical Lead Manager, ASIC Design , Machine Learning _corporate_fare_ Google _place_ Sunnyvale, CA,...+ 8 years of experience with IP Development or SoC Integration, from early architecture phase through tapeout. +… more
    Google (09/29/25)
    - Related Jobs

  • Sr. DFT Design Engineer, AWS Machine…

    Amazon (Austin, TX)
    …a member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
    Amazon (09/25/25)
    - Related Jobs

  • ASIC/FPGA Design Engineer (SMES)

    L3Harris (Camden, NJ)
    …products. + Experience mapping algorithms and standards (Ethernet, TCP/IP, AXI) to hardware and architecture/system design tradeoffs. + Proficient with CDC, RDC. ... in the interest of national security. Job Title: ASIC/FPGA Design Engineer (SMES) Job Code: 26283 Job Location: Camden,...+ Generate test plans + Perform module level verification, synthesis/ STA , Lab debug, SW driven validation on Linux based… more
    L3Harris (07/23/25)
    - Related Jobs

  • Senior Silicon Pre-to-Post Validation Lead, Raxium

    Google (Fremont, CA)
    …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip (ASIC/ SoC ) design , with a focus on both digital logic ... practical experience. + 10 years of experience in analog circuit design , including simulation and verification. + Experience working with relevant Electronic… more
    Google (10/04/25)
    - Related Jobs

  • RTL Manager

    Cadence Design Systems, Inc. (Austin, TX)
    …the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware , and intellectual property to ... looking for an experienced Manager to lead Front End Design projects. This is a challenging and rewarding opportunity...complex engineering projects *Rich experience in IP creation and/or SoC and IP (CPU, Memory, Interface) integration *Expert in… more
    Cadence Design Systems, Inc. (09/24/25)
    - Related Jobs

  • Lead Speed and Reliability Engineer - DFP

    NVIDIA (Santa Clara, CA)
    … hardware engineering position. + Previous engineering experience in CPU/GPU/ SOC NPI bringup, with focus on driving methodologies and testplans. Familiarity ... a plus, related to timing, speed, reliability and power. + Familiarity with STA timing closure, circuit design , noise characterization, product binning methods… more
    NVIDIA (08/28/25)
    - Related Jobs