- Cadence Design Systems, Inc. (San Jose, CA)
- …- DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC ... who want to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team… more
- Microsoft Corporation (Santa Clara, CA)
- …work on a wide range of exciting technologies including PCIe, DDR , processors and custom accelerators. **Responsibilities** **Pre-Silicon Verification ** Improves ... years thereafter. **Preferred Qualifications:** + Experience working with large verification projects, including cluster/ subsystem and fullchip environments. +… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll join a group of hard-working engineers to ... of tomorrow. What You'll Be Doing: + As a member of our Memory Subsystem Design team, you will collaborate with architects, software engineers, and circuit designers… more
- L3Harris (Rochester, NY)
- …analysis for Digital circuitry + Perform integration with other subsystems + Perform subsystem and system level verification and validation testing + Identify, ... and cyber domains in the interest of national security. Job Title: Senior Specialist, Electrical Engineer-Digital Design Job Code: 30310 Job Location: Rochester, NY… more