- Cisco (San Jose, CA)
- Senior DFx / RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose, California, US + Area of InterestEngineer - ... Jose, CA with a primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT… more
- NVIDIA (Santa Clara, CA)
- …the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and ... and Area (PPA) of innovative NVIDIA chips by evaluating trade-offs across DFx , Physical Implementation, Power Optimization and Ease of timing closure to innovate… more