- BAE Systems (Westminster, CO)
- …awards. Other incentives may be available based on position level and/or job specifics. ** Senior FPGA Verification Engineer ** **110106BR** EEO Career ... UVM components, and regressions/testlists. + Be responsible for generating and executing the FPGA Verification Test Plan and FPGA Verification Matrix. +… more
- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of ... assertions and coverage driven verification . - Experience using multiple verification platforms: UVM test bench, FPGA , emulator, software environments and… more
- Tarana Wireless (Milpitas, CA)
- …modules that you will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to ... generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to ensure that verification... FPGA and emulation engineers to ensure that verification requirements and coverage are met for each project… more
- Northrop Grumman (Linthicum Heights, MD)
- …career. We are looking for you to join our team as a Principal Digital Verification Engineer / Senior Principal Digital Verification Engineer based ... This requisition may be filled as a Principal Digital Engineer or a Senior Principal Digital ...cross-discipline engineering team in Mission Systems that encompasses Digital Verification Engineering to support ASIC and FPGA … more
- Northrop Grumman (Mcclellan, CA)
- …**a Full Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer :** + Bachelor's ... Secret/SCI security clearance with Polygraph** **.** **Preferred Qualifications Principal / Senior Principal Digital Verification Engineer :** + Advanced… more
- BAE Systems (Austin, TX)
- …available based on position level and/or job specifics. ** Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)** **114362BR** EEO ... your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop… more
- Capgemini (Austin, TX)
- …the Job You're Considering** We are seeking a seasoned and collaborative **SoC** **Design Verification Lead Engineer ** to join our dynamic team. In this role, ... and continuous learning. + Collaborate cross-functionally to define and refine SoC verification methodologies and flows. + Contribute to gate -level simulation… more
- Amazon (Sunnyvale, CA)
- Description As a Design Verification (DV) Engineer , you will be part of an advanced architecture team that is exploring new hardware designs to improve our ... coverage driven verification . - Experience using multiple verification platforms: UVM test bench, FPGA , emulator,...using multiple verification platforms: UVM test bench, FPGA , emulator, software environments and system testing - Track… more
- Huntington Ingalls Industries (Fort Meade, MD)
- …thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs. Candidates for this ... etc. * UVM concepts * Directed, constrained-random, and assertion-based verification (ABV) techniques at the gate , interface,...Software or hardware reverse-engineering (eg, IDA Pro, Ghidra) * FPGA design or verification * Familiarity with… more
- Huntington Ingalls Industries (Roanoke, VA)
- …thinkers who can uncover difficult-to-activate corner-case bugs and vulnerabilities in the gate -level netlists of FPGA and ASIC designs. Candidates for this ... etc. * UVM concepts * Directed, constrained-random, and assertion-based verification (ABV) techniques at the gate , interface,...Software or hardware reverse-engineering (eg, IDA Pro, Ghidra) * FPGA design or verification * Active Secret… more
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