• Micron Technology (Boise, ID)
    …development of new product opportunities by assisting with the overall design, layout , and optimization of Memory /Logic/Analog circuits and Parasitic modeling ... years of progressive, postbaccalaureate experience in job offered or in a Senior DRAM Design Engineer -related occupation. Position also requires experience in:… more
    Upward (07/07/25)
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  • E-Space (Saratoga, CA)
    …our overall quality of life. We are seeking a highly skilled and experienced Senior Hardware Engineer with expertise in signal integrity and thermal analysis to ... and ensure efficient thermal management. Optimize component placement and design layout to enhance heat dissipation. Simulation & Tools: Utilize industry-standard… more
    Upward (07/17/25)
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  • Micron Technology (Boise, ID)
    …life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, ... tasks to meet needed dates. Understand Automated Material Handling System (AMHS) layout including being able to analyze congestion and slow delivery times. Provide… more
    Upward (07/23/25)
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  • Serve Robotics (Redwood City, CA)
    …for high-performance robotic applications. What You'll Be Doing The Signal Integrity Engineer plays a critical role in ensuring the performance and reliability of ... guidelines and technical support throughout system architecture development, PCB layout , product bring-up, debugging, validation, and manufacturing. By conducting… more
    Upward (07/18/25)
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  • International Staffing Consultants, Inc. (Cambridge, MA)
    …for diverse applications, including processor boards, FPGA and SOC boards, and memory applications with a focus on DDR and high-speed I/O. Key Responsibilities: ... of trade space for radiation-hardened parts. Schematic capture and board layout expertise. Experience integrating and debugging embedded systems. Proficiency in… more
    Upward (07/05/25)
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  • Senior Memory Layout…

    Capgemini (Minneapolis, MN)
    **About the Job You're Considering** Join us as a Memory Layout Engineer , where you'll collaborate closely with SoC partners to craft innovative SRAM and ... play a key role in design reviews, contributing to the continuous improvement of memory layout quality and performance. **Your Role** + Design and implement… more
    Capgemini (07/24/25)
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  • SMTS, Memory Design Engineer

    Micron Technology, Inc. (Richardson, TX)
    …reticule experiments and required tape-out revisions. **_Contribute to the Design and Layout of New Memory Products_** + Implement device specifications and ... **.** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of...than ever. As a DRAM Engineering Group (DEG) Design Engineer at Micron Technology, Inc. and a Distinguished or… more
    Micron Technology, Inc. (06/12/25)
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  • Principal/Sr Principal Printed Circuit Board (PCB)…

    Northrop Grumman (Cincinnati, OH)
    …possible with us in Beavercreek, OH!** _This position can be filled as a Principal PCB Layout Engineer or Senior Principal PCB Layout Engineer ._ ... stackups and mechanical structures + Perform complex circuit card layout tasks including DDR memory interfaces, high...Top Secret/SCI security clearance with Polygraph **Basic Qualifications for Senior Principal PCB Layout Engineer :**… more
    Northrop Grumman (07/08/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Mask Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... with other team members on the new process technologies to design the layout of high-speed memory macros. You will have the opportunity to craft dense layout … more
    NVIDIA (06/10/25)
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  • Senior Signal Integrity Engineer…

    Palo Alto Networks (Santa Clara, CA)
    …Firewall and SD-WAN hardware including: selecting components; modeling and simulating memory and serdes interfaces; modeling PDN networks; defining PCB routing ... constraints; reviewing PCB layout ; developing test plans; performing hands-on measurements to validate...+ Simulate Channel Analysis for high speed serdes and memory interfaces + Design and analyze high-speed serial links… more
    Palo Alto Networks (07/26/25)
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