• Senior Static Timing…

    Google (Sunnyvale, CA)
    …Science, a related field, or equivalent practical experience. + 5 years of experience in static timing analysis. + Experience in full chip timing sign-off ... ASICs. + Experience in PrimeTime or Tempus TCL scripting and static timing analysis debug. Preferred qualifications: + Experience writing, reviewing and… more
    Google (07/02/25)
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  • Senior Principal ASIC Static…

    Northrop Grumman (Morrisville, NC)
    …work of your career. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, ... an active DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for static timing analysis on digital designs to ensure timing requirements… more
    Northrop Grumman (07/11/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …+ Experience in critical path planning and crafting needed. + Power user of Static Timing tools like Synopsys PrimeTime or Cadence Tempus. + Solid experience ... human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join...in full-chip/sub-chip Static Timing Analysis (STA), timing … more
    NVIDIA (05/14/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! ... experience in Physical design/ Timing . + Experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and… more
    NVIDIA (06/10/25)
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  • Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... in Synthesis and Timing + Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA), timing constraints generation and management, and … more
    NVIDIA (06/30/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... experience in Timing and STA + Hands-on experience in full-chip/sub-chip Static Timing Analysis (STA) and timing convergence, timing constraints… more
    NVIDIA (06/17/25)
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  • Senior Async and IO Timing…

    NVIDIA (Santa Clara, CA)
    …or related field (or equivalent experience). + 6+ years of experience in static timing analysis, methodology, or constraint development. + Strong expertise in ... human inventiveness and intelligence. We are seeking a highly skilled Timing Methodology Engineer with expertise in asynchronous timing and I/O interface… more
    NVIDIA (05/22/25)
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  • Senior High-Performance ASIC Timing…

    NVIDIA (Santa Clara, CA)
    …next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You will be ... responsible for all aspects of timing including setting up timing constraints, timing analysis and closure, ECO implementation, and timing methodologies.… more
    NVIDIA (06/24/25)
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  • Senior VLSI CAD R&D, Power…

    NVIDIA (Austin, TX)
    …Engineering or Device Physics (or equivalent experience) + 8+ years experience in gate-level static timing analysis and/or power analysis + Proficiency in C++ + ... algorithms in C++. We are seeking a CAD R&D Engineer excited to innovate in algorithms for large scale...algorithms for large scale and high accuracy gate-level power, timing , parasitic, and noise analysis. A deep understanding of… more
    NVIDIA (05/22/25)
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  • Senior Physical Design Engineer

    Microsoft Corporation (Austin, TX)
    …domain. + Facilitate coordination across cross-functional teams, including DFT, RTL/Design/IP, Static Timing Analysis (STA), CAD, Architecture, Power & ... optimize the Cloud infrastructure. We are looking for a ** Senior Physical Design Engineer ** to join the...including DFT modes and methodologies, with comprehensive experience in Static Timing Analysis (STA) for complex hierarchical… more
    Microsoft Corporation (07/16/25)
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