- Two95 International Inc. (Sunnyvale, CA)
- Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog ... of proven experience on ASIC / SoC / IP Verification . * Strong experience in SystemVerilog and UVM ...Verification . * Strong experience in SystemVerilog and UVM verification methodologies * Proficiency in Object Oriented programming, computer… more
- NVIDIA (Westford, MA)
- NVIDIA is seeking a Senior Design Verification Engineer to verify the design and implementation of the next generation of High Speed I/O controllers for the ... High Speed I/O controllers, like PCIE and NVLink, at IP/sub- system levels using advanced DV methodologies such as UVM....engineer who loves a challenge? Join our HSIO Verification team and help us build future interconnect architectures… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual ... most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify...programming language experience, scripting ability and an expertise in System Verilog. + Exposure to design and verification… more
- Microsoft Corporation (Redmond, WA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior IP Verification Engineer ** to join the team. **Responsibilities** + ... creating, maintaining, or integrating test benches, checkers and stimulus using Universal Verification Methodology (UVM), System Verilog Test Bench (SVTB), and… more
- Amazon (Sunnyvale, CA)
- …Neural Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of ... methodology and implementing the corresponding test plan for sub- systems and the full chip. You will participate in...across multiple disciplines - Deliver detailed test plans for verification of the full chip or sub- system … more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System ...art verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer ! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the ... + 5+ years of relevant work experience + Proficiency in verification languages ( System Verilog or equivalent) and methodologies (UVM or equivalent) + Experience… more
- BAE Systems (Westminster, CO)
- …Other incentives may be available based on position level and/or job specifics. ** Senior FPGA Verification Engineer ** **110106BR** EEO Career Site Equal ... interfaces/protocols), design and implement test benches for both unit level and system level environments, and create reusable verification environments that… more
- Tarana Wireless (Milpitas, CA)
- …modules that you will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to ... you'll be doing: + Work with some of the best DSP, system , and software engineers to define verification strategies and execute plans at system or full chip… more
- NVIDIA (Belfast, ME)
- NVIDIA is looking for a Senior Verification Engineer to join our Networking Chip Design team in Belfast, focusing on products such as our ConnectX Ethernet ... (DPUs), which are revolutionising today's Data Centre. As a Senior Chip-Design Verification Engineer , you...core units within the Network Adapter and BlueField SoC ( System -on-Chip) silicon teams + Use advanced verification … more
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