• Principal / Senior Principal

    Northrop Grumman (Annapolis Junction, MD)
    …- Liberty (timing model), SDC (Synopsys Design Constraints) **Basic Qualifications for Sr . Principal Digital ASIC Circuit Design Engineer Level:** ... on board.** **This position can be filled at the Principal level OR the Sr . Principal...Qualifications for both are listed below:** **Basic Qualifications for Principal Digital ASIC Circuit Design more
    Northrop Grumman (11/26/25)
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  • Sr Principal ASIC

    Palo Alto Networks (Santa Clara, CA)
    …military experience required - MSEE preferred + Minimum 5 years experience in ASIC design verification + Demonstrated success in taking multiple ASIC ... of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking… more
    Palo Alto Networks (12/02/25)
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  • Sr . Principal ASIC /Analog…

    Teledyne (Goleta, CA)
    …factory automation, air and water quality environmental monitoring, electronics design and development, oceanographic research, deepwater oil and gas exploration ... a team that wins. **Job Description** The Integrated Circuit Design group at Teledyne FLIR develops the image sensors...leads to an ever changing and demanding set of design specifications that will keep you challenged and always… more
    Teledyne (10/02/25)
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  • Senior / Principal Mixed Signal…

    Sandia National Laboratories (Albuquerque, NM)
    …Products and Designs, is looking for an early-career Analog Mixed Signal IC Design Electronics Engineer to join our team focused on developing advanced CMOS chips. ... arrays. On any given day, you may be called on to: + Design , assess, and test integrated circuits for sensor microsystems. + Convert customer requirements… more
    Sandia National Laboratories (11/22/25)
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  • Principal / Senior Principal

    Northrop Grumman (Linthicum Heights, MD)
    …**a Top Secret/SCI security clearance with Polygraph** **.** **Basic Qualifications Senior Principal Digital Verification Engineer:** + Bachelor's degree in ... a** **Top Secret/SCI security clearance with Polygraph** **.** **Preferred Qualifications Principal / Senior Principal Digital Verification Engineer:**… more
    Northrop Grumman (11/06/25)
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  • Principal / Senior Principal

    Northrop Grumman (Linthicum Heights, MD)
    …and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough understanding of digital design concepts + ... hired + Experience in full product life cycle of ASIC Design + Experience with Cadence and/or...would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's… more
    Northrop Grumman (11/21/25)
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  • Senior Principal Engineer…

    BAE Systems (Cedar Rapids, IA)
    …Other incentives may be available based on position level and/or job specifics. ** Senior Principal Engineer - ASIC /FPGA Verification (Hybrid)** **117726BR** ... customers to execute their precision navigation missions. BAE is looking for experienced senior level ASIC /FPGA Design Verification Engineers who can plan,… more
    BAE Systems (10/24/25)
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  • Senior Principal ASIC Static…

    Northrop Grumman (Linthicum Heights, MD)
    …+ 4 years of experience in the full product life cycle of ASIC Design **Preferred Qualifications:** + Master's Degree in Electrical or Computer ... and perform or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and… more
    Northrop Grumman (11/13/25)
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  • Sr Principal DFT Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …who want to make an impact on the world of technology. We are looking for SoC/ ASIC Digital Design Engineer with experience in Design for Test (DFT). An ... Verilog testbenches. Requirements; + Prior 5-15 years of professional experience in SoC/ ASIC Digital Design with focus on Design for Test (DFT) + Should… more
    Cadence Design Systems, Inc. (12/04/25)
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  • Principal / Sr . Principal

    Northrop Grumman (Linthicum Heights, MD)
    …System Requirements. + Experience managing requirements in CAMEO. + Knowledge of ASIC design , Signal Processing, and/or IC Device Fabrication. + Experience ... The Systems Engineering Integration & Test (SEIT) department is seeking ** Principal / Sr . Principal Systems Engineer** to join our… more
    Northrop Grumman (11/05/25)
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