- Cadence Design Systems, Inc. (Cary, NC)
- …looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain insertion, compression scan ... SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT...( DFT ) + Should possess intimate knowledge of DFT insertion flows + Basic scan chain insertion using… more
- Northrop Grumman (Morrisville, NC)
- …history. Northrop Grumman Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse individuals in ... DoD Secret clearance.** **Roles and Responsibilities:** + Responsible for DFT (Design for Testabilty) aspects of ASIC Design thorough...time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …leaders and innovators who want to make an impact on the world of technology. Sr Principal Application Engineering (AE) - a blend of pre-sales, post-sales ... with IC digital implementation flows and font-end EDA tools including Synthesis, DFT , and Logical Equivalence Checking + Prior experience with Cadence tools such… more
- Cadence Design Systems, Inc. (Austin, TX)
- …customer, and sales skills. Key Responsibilities + Be part of team of Application Engineers providing technical support to Cadence customers in the areas of Backend ... with IC digital implementation flows and font-end EDA tools including Synthesis, DFT , and Logical Equivalence Checking + Prior experience with Cadence tools such… more
- RTX Corporation (Cedar Rapids, IA)
- …systems. **Security Clearance:** None/Not Required We are looking for a ** Senior Principal ** **Manufacturing** **Project Engineer** - **Post Wave ... design to cost (DTC), design for manufacture (DFM), design for testability ( DFT ), and product prototyping processes. + Ensure Operations considerations, such as… more
- Northrop Grumman (Morrisville, NC)
- …Computer Engineering + Knowledge of Synthesis, Place & Route (P&R), and Design-for-Test ( DFT ) methodologies + Active DoD Secret Clearance or higher As a full-time ... Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …technology. We are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field Applications Team. Working ... with IC digital implementation flows and font-end EDA tools including Synthesis, DFT , and Logical Equivalence Checking + Prior experience with Cadence tools such… more
- Palo Alto Networks (Santa Clara, CA)
- …structured approaches to automated testing and a desire to collaborate with senior application architects and developers in the creation of automation ... ease of deployment across global sites + Drive Design for Testability ( DFT ) and manufacturing excellence by influencing product architecture early in the development… more
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