- Cadence Design Systems, Inc. (San Jose, CA)
- …technology. We are looking for SoC/ASIC Digital Design Engineer with experience in Design for Test ( DFT ). An intimate knowledge and experience in scan chain ... of professional experience in SoC/ASIC Digital Design with focus on Design for Test ( DFT ) + Should possess intimate knowledge of DFT insertion flows +… more
- Northrop Grumman (Linthicum Heights, MD)
- …and Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of ... to obtain and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough… more
- Northrop Grumman (Linthicum Heights, MD)
- …and/or our Annapolis Junction, MD location.** **This position can be filled at the Principal level OR the Sr . Principal level. Qualifications for both ... US Government security clearance per business requirements. **Basic Qualifications for a Sr . Principal Computational Physicist:** + Bachelor's Degree in Science,… more
- BAE Systems (Nashua, NH)
- **Job Description** BAE Systems is seeking a proactive Sr . Principal Mechanical Engineer with diverse analytical capabilities and demonstrated technical ... incentives may be available based on position level and/or job specifics. ** Sr . Principal Mechanical Engineer** **118601BR** EEO Career Site Equal Opportunity… more
- Northrop Grumman (Annapolis Junction, MD)
- …- Liberty (timing model), SDC (Synopsys Design Constraints) **Basic Qualifications for Sr . Principal Digital ASIC Circuit Design Engineer Level:** + ... on board.** **This position can be filled at the Principal level OR the Sr . Principal...(RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion) + Proficiency with current ASIC design… more
- Celestica (San Jose, CA)
- …Overview** Functional Area: Engineering (ENG) Career Stream: Engineering (ENG) Role: Senior Director (SDR) Job Title: Senior Director, Manufacturing and ... Indicator: Indirect **Summary** The role is for a highly accomplished and forward-thinking Sr . Director of Engineering (Hardware and Software) for a leading role in… more
- Celestica (San Jose, CA)
- …131053 Region: Americas Country: USA State/Province: California City: San Jose **Summary** The Principal Engineer, PCB Layout is a senior technical leader and ... stringent signal integrity, power integrity, and DFM requirements. The Principal Engineer leads PCB strategy and owns the end-to-end...for Manufacturability (DFM), Design for Assembly (DFA), Design for Test ( DFT ), and Design… more
- Palo Alto Networks (Santa Clara, CA)
- …complexities for test coverage and serviceability with ICT and boundary scan + Drive DfT ( Design for Testability) and test coverage analyses from early Prototype ... years of electronics manufacturing testing experience + Experience with electronics system design and DfT + Experience with ICT vendor management, performance… more
- RTX Corporation (Cedar Rapids, IA)
- …role. **Security Clearance:** None/Not Required We are seeking a highly motivated Senior Principal Electrical Engineer to join the Computing Products Hardware ... Design to Cost (DTC+), Design for Manufacturing (DFM), Design for Test ( DFT ) + Project leadership experience **What We Offer:** Benefits: Some of our… more
- Northrop Grumman (Linthicum Heights, MD)
- …or Computer Engineering + Knowledge of Synthesis, Place & Route (P&R), and Design -for-Test ( DFT ) methodologies + Active DoD Secret Clearance or higher + ... and perform or propose changes to fix them + Work closely with design , verification, design -for-test and physical design teams to optimize the timing and… more