- Amazon (Portland, OR)
- …AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - STA Engineer to continue to innovate on behalf ... STA and Signoff for a complex, multi-clock, multi-voltage SoC . * Streamlining the timing signoff criterions, timing analysis...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. *… more
- SpaceX (Sunnyvale, CA)
- Sr . SOC /ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC /ASIC PHYSICAL DESIGN ENGINEER...weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your… more
- SpaceX (Bastrop, TX)
- Sr . SOC /ASIC Physical Design Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC /ASIC PHYSICAL DESIGN ENGINEER...and fix signoff closure issues in static timing analysis ( STA ), noise, logic equivalency, physical verification, electromigration and voltage… more
- Capgemini (CO)
- …Collaborate closely with block and SoC design teams to understand design requirements, STA constraints, and convergence challenges. + Work in tandem with ... **About the Job You're Considering** + Develop block-level and SoC -level timing constraints, and drive full-chip STA setup and signoff for multi-corner,… more
- Honeywell (Phoenix, AZ)
- …architecture, design , test and integration phases. **Key Responsibilities** + VHDL, DSP, STA Knowledge + Xilinx FPGA Design and Development + IC Experience + ... Build Requirements, Design and Simulation + Conduct Code Synthesis + Integration...Loops, Op Amp designs + Strong experience in Xilinx FPGA/ SOC development, ASICs + Some software coding skills, preferably… more
- Amazon (Austin, TX)
- …member of the Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers. You'll provide leadership ... possible today. Key job responsibilities * Develop, implement and verify state-of-the-art Design for Test (DFT) architectures * Work with block designers to… more
- Microsoft Corporation (Austin, TX)
- …will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Physical Design Engineer** to join the team. **Responsibilities** + Accountable ... (PD) domain. + Facilitate coordination across cross-functional teams, including DFT, RTL/ Design /IP, Static Timing Analysis ( STA ), CAD, Architecture, Power &… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... related field. + 5+ years of hands-on experience in SoC architecture, RTL design , and verification. +...implementation. + Familiarity with related domains such as clocking, STA , place & route, and power optimization. + Experience… more
- L3Harris (Camden, NJ)
- …with any of protocols : Ethernet, TCP/IP, PCIe, NVMe, USB + Experience with Xilinx SoC design with SDKs and PetaLinux OS + Experience with High-Level Synthesis ... domains in the interest of national security. Job Title: Sr ASIC/FPGA VHDL Design Engineer Job Code:...Job Description: Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) will be part… more
- Microsoft Corporation (Redmond, WA)
- …low power static checkers, linting, etc). + Demonstrated proficiency in Computer Architecture, Digital Design , CPU/ SoC design principles as part of CPU, ... optimize the Cloud infrastructure. We are looking for a ** Senior Fabric Design ** **Engineer** to join the...as AXI or CHI. + Familiarity with Synthesis and STA tools. + Good verbal and written communication skills.… more