• Principal PCB & Substrate Layout

    PDS Defense (Phoenix, AZ)
    …we produce quality products using your expertise in PCB and Substrate layout engineering. Responsibilities: * Driving design , layout , and analysis of ... **Other Professional** **Principal PCB & Substrate Layout Engineer** Phoenix, AZ Posted:...Experience: 10+ years as a PCB and/or High-Density Package Layout designer using industry standard layout more
    PDS Defense (06/27/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …plane and power distribution using Cadence APD or SiP tool suite. + Propose layout design trade-offs to the Technical Package Lead for resolution and ... Lead and different design teams in the design and development of sophisticated, detailed layout ...HDI designs is a plus + Proven experience in substrate layout of wire bond and flip… more
    NVIDIA (07/10/25)
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  • Senior Packaging Technical Engineer - Hardware

    NVIDIA (CA)
    …the chip pad ring, substrate interconnect scheme, and lead the package layout design process. + We collaborate with large teams consisting of Circuit, ... Signal Integrity, RTL, Place and Route, substrate layout and system design Engineers and Managers. + Work to define a chip floor plan, pad ring, substrate more
    NVIDIA (07/08/25)
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  • Principal / Senior Principal Electromechanical…

    Northrop Grumman (Baltimore, MD)
    design and signal routing, including chip-scale packaging technologies and substrate \PWB layout + Working knowledge of materials, specifications, ... design and signal routing, including chip-scale packaging technologies and substrate \PWB layout + Working knowledge of materials, specifications,… more
    Northrop Grumman (05/23/25)
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  • Senior Signal and Power Integrity Engineer…

    NVIDIA (Santa Clara, CA)
    …of SI models using data from lab measurements and/or modelling tool/methodology updates. + Substrate and board layout SI guidelines creation, review and post ... on crafting creative Signal Integrity solutions to complex system design problems. + Modeling and Optimization of vias, connectors,...DSO, ParBERT and use of tools/applications like ADS, Ansys Designer , JMP, Matlab, Cadence Allegro will be a plus.… more
    NVIDIA (06/10/25)
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  • Senior Signal and Power Integrity Engineer…

    NVIDIA (Santa Clara, CA)
    …of SI models using data from lab measurements and/or modelling tool/methodology updates. + Substrate and board layout SI guidelines creation, review and post ... on crafting creative Signal Integrity solutions to complex system design problems. + Modeling and Optimization of vias, connectors,...DSO, ParBERT and use of tools/applications like ADS, Ansys Designer , JMP, Matlab, Cadence Allegro will be a plus.… more
    NVIDIA (07/11/25)
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  • Advanced IC Package Designer

    Cisco Systems Inc (San Jose, CA)
    …to understand needs and to create guidance for package implementation + Plan substrate designs, including stackups, materials, and design rules, optimized to ... with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the...ASIC team is looking for an advanced IC package designer to help us develop our next generation silicon… more
    Cisco Systems Inc (07/11/25)
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  • Package Design Engineer

    Meta (Menlo Park, CA)
    …package SI/PI design activities, including substrate stackup/material selection, design guide implementation, layout review, and post- layout analysis ... EMIB, embedded fanout bridge from OSAT 3. Hands on experience of substrate design and trade off relative to SI/PI, mechanical, thermal and electrical analysis… more
    Meta (06/28/25)
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  • Manager SiPh Packaging Architecture, Design

    Global Foundries (Malta, NY)
    …HFSS, Zmax , Flotherm , or other design and modeling tools. + Package design and layout know le dge + Strong written and spoken English communication skills ... is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired… more
    Global Foundries (07/24/25)
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  • Scientist, Space Systems - Phased Array RF…

    L3Harris (Palm Bay, FL)
    …interest of national security. Job Title: Scientist, Space Systems - Phased Array RF Design Engineer Job Code: 24693 Job Location: Palm Bay, FL Job Description: The ... Systems segment is seeking an exceptional Phased Array RF Design Engineer to lead sophisticated RF/Microwave design ...Generators, RF Power Sensors, etc. + Schematic and PCB layout experience using Xpedition or Cadence + Troubleshooting RF… more
    L3Harris (06/12/25)
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