• TPU Silicon System

    Google (Madison, WI)
    …development of silicon -based ICs and chips. + Experience in HW/SW integration and validation. + Experience with RTL development or evaluation. + Experience in ... integration and validation to demonstrate HW, SW, and system functionality and performance. Help the chip team accomplish... functionality and performance. Help the chip team accomplish silicon development criteria, meet chip and system more
    Google (04/22/25)
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  • Senior ASIC Design Verification Engineer,…

    Google (Sunnyvale, CA)
    …complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems . The ML, Systems , & Cloud AI (MSCA) ... bring-up. + Familiarity with ASIC standard interfaces and memory system architecture. In this role, you'll work to shape...silicon solutions that power the future of Google's TPU . You'll contribute to the innovation behind products loved… more
    Google (04/25/25)
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  • ASIC Design Verification Engineer, TPU

    Google (Sunnyvale, CA)
    …digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems . As an ASIC Design Verification Engineer, you will ... developing custom silicon solutions that power the future of Google's TPU . You'll contribute to the innovation behind products loved by millions worldwide, and… more
    Google (04/18/25)
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  • Physical Design Engineer, TPU

    Google (Sunnyvale, CA)
    …complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems . The ML, Systems , & Cloud AI (MSCA) ... developing custom silicon solutions that power the future of Google's TPU . You'll contribute to the innovation behind products loved by millions worldwide, and… more
    Google (04/02/25)
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  • TPU Microarchitecture Design Lead

    Google (Mountain View, CA)
    …practical experience. + 8 years of experience with RTL design using Verilog/ System Verilog and microarchitecture. + 4 years of experience in leading IP/SoC ... lead a project team that delivers Machine Learning IPs for Google Silicon SoCs. + Define microarchitecture details for Machine learning processors and accelerators… more
    Google (04/22/25)
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  • PHY Design IP Integration Technologist

    Google (Sunnyvale, CA)
    …coordinating all aspects of the IP integration across all phases of the silicon lifecycle. The ML, Systems , & Cloud AI (MSCA) organization at Google designs, ... integration . As part of the Tensor Processing Unit ( TPU ) interface design team, you will play a pivotal...Physical Design, IP planning, and roadmap definition. + Drive pre- silicon integration of PHY Design IPs. +… more
    Google (04/25/25)
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  • PHY Design IP Integration Technologist,…

    Google (Sunnyvale, CA)
    …coordinating all aspects of the IP integration across all phases of the silicon lifecycle. The ML, Systems & Cloud AI (MSCA) organization at Google designs, ... generation of hardware experiences, delivering unparalleled performance, efficiency, and integration . As part of the TPU interface...PHY Design IP planning and roadmap definition. + Drive pre- silicon integration of PHY Design IPs. +… more
    Google (03/04/25)
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  • ASIC/SoC System Level Test Engineer

    Google (Sunnyvale, CA)
    …complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems . As a System Level Test Engineer, you ... silicon solutions that power the future of Google's TPU . You'll contribute to the innovation behind products loved...frameworks and test modules, and integrating test cases from silicon validation and system software and test… more
    Google (03/21/25)
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  • Hardware Systems Engineer, AI NPI

    Meta (Bellevue, WA)
    …firmware validation, system validation. 12. 3+ years of experience with leading Silicon or System troubleshooting and debugging 13. 3+ years of experience in ... following modules/domains: PCIe, NVlink, Networking, Flash, Memory, CPU, GPU, TPU , DRAM (DDR4/5 or HBM), AI silicon /AI...deployments. 28. 7+ years of experience in using continuous integration and version control tools for system more
    Meta (02/05/25)
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  • Physical Design Engineer, Custom Datapath

    Google (Sunnyvale, CA)
    …digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems . As a Custom Datapath Physical Design Engineer on ... silicon solutions that power the future of Google's TPU . You'll contribute to the innovation behind products loved...your ideas into our flows and designs. The ML, Systems , & Cloud AI (MSCA) organization at Google designs,… more
    Google (03/21/25)
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