- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...DFX, Clocks, and other teams in coming up with timing closure strategy, creating timing constraints, driving… more
- Qualcomm (Folsom, CA)
- …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design team to develop ... timing constraints, drive implementation of the designs to meet...STA native tools and also useful in enabling CPU timing infrastructure and methodology impacting multiple CPU projects in… more
- Leidos (Dayton, OH)
- **Description** **Join Our Leidos Team as a Positioning, Navigation, and Timing Engineer !** Are you ready to elevate your career to new heights? Leidos is on the ... lookout for a talented and enthusiastic PNT Engineer to join our dynamic team supporting the National...testing, and documenting simulations related to Positioning, Navigation, and Timing (PNT). And let's not forget-you'll be part of… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the ... IR drop etc. + Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off… more
- Qualcomm (San Diego, CA)
- …Inc. **Job Area:** Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing ... complex SOC's. Hands on contribution for STA timing sign off. + A timing Engineer should be able to understand all kind of intricate timing paths… more
- Meta (Austin, TX)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing Constraints ... and the top-level including SOC. 2. Analyze the inter-block timing and come up with IO budgets for the...budgets for the various partition blocks. 3. Develop SOC Timing Full chip Flat & Hierarchical Constraints for Functional… more
- SpaceX (Irvine, CA)
- …critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Physical Design STA/ Timing Engineer /Level I: $120,000.00 - $145,000.00/per year Physical Design ... SOC/ASIC Timing Signoff & Front-End Implementation Engineer ...STA/ Timing Engineer /Level II: $140,000.00 - $170,000.00/per year Your actual level… more
- City of New York (New York, NY)
- …The Division of Traffic Operations seeks to hire an experienced Assistant Civil Engineer to support traffic signal timing and intersection control operations in ... position, the candidate must be serving permanently in the title of Assistant Civil Engineer , or must have taken, passed, and be reachable on the Open Competitive… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you'll be doing: + Develop and execute timing closure plans for NVIDIA's next generation of high-performance IPs for CPU, ... GPU and SOC designs. + Owning static timing analysis and convergence of high-performance designs. + You...+ You will be responsible for all aspects of timing including setting up timing constraints, … more
- NVIDIA (Westford, MA)
- …inventiveness and intelligence. NVIDIA is looking for best-in-class Senior ASIC Timing Design Engineers to join our outstanding Networking Silicon engineering team, ... be doing: + You will drive physical design and timing of high-frequency and low-power DPUs and SoCs at...from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and… more