• Senior UVM Digital…

    Draper (Boston, MA)
    …Summary: Draper's Digital Design Team is seeking a motivated and experienced Senior UVM Digital Verification Engineer to tackle novel verification ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
    Draper (06/21/25)
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  • UVM Digital Verification…

    Draper (Boston, MA)
    …Description Summary: Draper's Digital Design Team is seeking a motivated and experienced UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal... digital and embedded hardware platforms. + Develop verification and test plans + Develop UVM … more
    Draper (06/21/25)
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  • Principal UVM Digital…

    Draper (Boston, MA)
    …Summary: Draper's Digital Design Team is seeking a motivated and experienced Principal UVM Digital Verification Engineer to tackle novel ... and ASICs. In this role, you will apply modern verification strategies to complex digital and mixed-signal...+ Strong analysis and problem-solving skills ​ + Develop verification and test plans + Develop UVM … more
    Draper (06/21/25)
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  • Principal Digital Verification…

    Northrop Grumman (Linthicum Heights, MD)
    …of your career. We are looking for you to join our team as a Principal Digital Verification Engineer /Senior Principal Digital Verification ... NC. This requisition may be filled as a Principal Digital Engineer or a Senior Principal ...complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilogl. +… more
    Northrop Grumman (08/20/25)
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  • Senior Digital Design Verification…

    NVIDIA (Santa Clara, CA)
    We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... to join our diverse team today! As a Senior Digital Design Verification Engineer at...models and micro-architecture of the SerDes IPs using advanced verification methodologies such as UVM . + Build… more
    NVIDIA (08/28/25)
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  • Staff Digital Verification…

    Northrop Grumman (Annapolis Junction, MD)
    …**_This work will be done 100% onsite in Linthicum, MD._** **Basic Qualifications Staff Digital Verification Engineer :** + Bachelor's degree in a technical ... and able to obtain and maintain a security clearance.** **Preferred Qualifications Staff Digital Verification Engineer :** + Advanced Degree either MS or… more
    Northrop Grumman (08/27/25)
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  • Digital Design Verification…

    Capgemini (Santa Clara, CA)
    **About the Job You're Considering** We're looking for a collaborative Digital Design Verification Engineer to help shape the future of SoC development. In ... continuous learning, and innovative problem-solving. **Your Role** + Develop and implement verification environments using SystemVerilog and UVM for IPs and SoCs… more
    Capgemini (08/14/25)
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  • Digital Verification Engineer

    Broadcom (San Jose, CA)
    …Sign-In before you apply.** **Job Description:** Broadcom is looking for a senior level Digital Design Verification engineer . In this highly visible role you ... PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in digital design verification + Hands on experience in SV UVM , SV RNM and … more
    Broadcom (07/11/25)
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  • Design Verification Engineer…

    Amazon (Sunnyvale, CA)
    …networking and satellite bus FPGAs A day in the life Kuiper Production team FPGA verification engineer . Create UVM verification simulation solutions. The ... Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining ...will work with design and systems teams to define/develop/implement/test/release UVM test environments in order to verify FPGA based… more
    Amazon (07/05/25)
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  • Senior Digital Verification…

    Huntington Ingalls Industries (Fort Meade, MD)
    …Engineering, Computer Science, or a related field * Experience with modern digital verification and modeling languages: SystemVerilog, SystemC, C/C++, Matlab, ... short video: https://vimeo.com/732533072 Job Description Do you enjoy challenging digital design verification problems? HII Mission Technologies...etc. * UVM concepts * Directed, constrained-random, and assertion-based … more
    Huntington Ingalls Industries (07/10/25)
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