• Senior VLSI CAD Engineer…

    NVIDIA (Santa Clara, CA)
    …across all NVIDIA product lines many thousands of times per day. We are seeking a CAD R&D Engineer excited to innovate in algorithms related to ECO ... timing and power optimization. A thorough understanding of both VLSI hardware design and efficient software implementations is key....of code, but this is broader than a typical CAD or EDA role. Instead, we as a team… more
    NVIDIA (05/22/25)
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  • VLSI CAD Engineer…

    NVIDIA (Santa Clara, CA)
    …across all NVIDIA product lines many thousands of times per day. We are seeking a CAD R&D Engineer excited to innovate in algorithms related to ECO ... timing and power optimization. A thorough understanding of both VLSI hardware design and efficient software implementations is key....of code, but this is broader than a typical CAD or EDA role. Instead, we as a team… more
    NVIDIA (07/14/25)
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  • ASIC Timing and Methodology Engineer

    Qualcomm (San Diego, CA)
    …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... physical design team (and other teams) on timing closure, CAD teams, IP teams and Design Technology Teams for...Qualcomm using PT-SI, Tempus and best in class timing ECO tools . Work on timing sign off specification… more
    Qualcomm (05/15/25)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused company. ... scalable RTL designs, execute synthesis and perform timing analysis using innovative CAD tools and the latest process technologies. + Work on functional… more
    NVIDIA (05/30/25)
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