- Qualcomm (San Diego, CA)
- …**Required Qualifications:** + Intelligent and high potential of learning new topics. + Familiarity with DDR interface, JEDEC spec, bus level view of ... create a smarter, connected future for all. Qualcomm's Silicon Validation team is part of the central SoC digital...languages and methodologies included in this team are: + DDR related debug + Regressionand PVT testing + Emulation… more
- Qualcomm (San Diego, CA)
- …Engineering Group > ASICS Engineering **General Summary:** As a SoC Power/Performance Post-Si Validation & Emulation Engineer , you will be a vital member of ... of SoC silicon by employing both pre-silicon (emulation) and post-silicon validation techniques. This role involves verifying SoC/CPU/GPU/ DDR /NOC blocks,… more
- Amazon (Redmond, WA)
- …to firmware-hardware interaction debugging. * Knowledge of DFT/DFD, scan chain, or BIST validation . * Familiarity with signal processing concepts and/or RF test ... the world. We are seeking a highly motivated and experienced Post-Silicon Verification Engineer with strong expertise in Digital ASIC and modem (PHY and MAC layer)… more
- ManpowerGroup (Redmond, WA)
- Our client, a leader in the semiconductor industry, is seeking a Hardware Design & Validation Engineer - AI Semiconductor Systems to join their team. As a ... Hardware Design & Validation Engineer , you will be part of...design and verification, including CDC, lint, and synthesis. + Familiarity with industry-standard interfaces (I2C, JTAG, UART) and memory… more
- Blue Cheetah Analog Design (Sunnyvale, CA)
- Silicon Validation Engineer Engineer [On-site Position - Sunnyvale, CA] Blue Cheetah Analog Design Inc. is a semiconductor technology start-up headquartered ... Description: * Use your silicon test experience to perform validation and qualification of our D2D silicon testchips *...tests * Thorough knowledge of oscilloscopes and BERTS * Familiarity with concepts of Jitter, Noise, & other non-idealities… more
- Amazon (Redmond, WA)
- …define a new system with few legacy constraints. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions ... solutions - Design and debug high-speed interfaces including Ethernet, PCIe, and DDR - Debug hardware issues using logic analyzers and oscilloscopes - Create… more
- Qualcomm (San Diego, CA)
- …SERDES Interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI,CSI), PLLs and leading edge LP- DDR & PC- DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY ... data analysis of parametric performance over various operating conditions and configurations. Engineer will also assist in HW design and debug power integrity (PI)… more
- Capgemini (Austin, TX)
- …annotation, and post-silicon readiness activities. + Interface with Verification IPs (eg, PCIE, DDR , CHI) and ensure robust integration and validation . + Promote ... are seeking a seasoned and collaborative Design Verification Lead Engineer to join our dynamic team. In this role,...DDR , and CHI protocols, including PCIE-VIP usage. + Familiarity with advanced peripheral bus Verification IPs: GPIO, UART,… more
- Qualcomm (San Diego, CA)
- …+ Master's degree in Electrical or Computer Engineering Experience with/in: + Familiarity of overall SoC Infrastructure - DDR , Busses, CPUs, I/Os ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...power sequencing and multi-voltage domain design + Power analysis familiarity in areas of clocktree, peak power, TDP, limits… more
- Microsoft Corporation (Hillsboro, OR)
- …Within the Firmware Center of Excellence, we're looking for a customer-focused, hands-on SW engineer to help us develop a suite of system validation and ... and located in different geographic locations. We are looking for a Principal Firmware Engineer to join the team. Microsoft's mission is to empower every person and… more