- Meta (Olympia, WA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Meta (Olympia, WA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
- Amazon (Redmond, WA)
- …in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . Work ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
- Meta (Olympia, WA)
- …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD… more
- Amazon (Redmond, WA)
- …methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable digital design teams to meet PPA ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...and debugging techniques - Familiar with basic Synthesis and Formal Verification methodology and flow development experience… more
- Capgemini (Seattle, WA)
- **Job Description:** We are seeking a SoC Design Verification Engineer to join our team 100% onsite in either Seattle, WA or Santa Clara, CA. The ideal candidate ... areas in addition to functional verification : + SystemVerilog Assertions (SVA) + Formal Verification + Emulation + Experience with EDA tools and scripting… more
- Meta (Redmond, WA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 12.… more
- Microsoft Corporation (Redmond, WA)
- …and software engineers around the world. We are looking for a **Senior Quantum Engineer - Cryo-CMOS Digital Circuit Design** . Our Cryo-CMOS team is looking for an ... experienced application-specific integrated circuit ( ASIC ) designer to participate in the research and development...of partitions through all signoffs including timing signoff, physical verification , EMIR signoff, and Low Power Verification .… more
- Microsoft Corporation (Redmond, WA)
- …/ Machine Learning (ML) SoCs + Working knowledge of writing assertions, coverage and formal verification Silicon Engineering IC5 - The typical base pay range for ... manage and optimize the Cloud infrastructure. We are looking for a **Principal Design Engineer ** to join the team. Microsoft's mission is to empower every person and… more
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