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We are now looking for a Senior ASIC Design Engineer - DFX

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. Make the choice to join us today. Design-for-Test Engineering at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the industry's most complex semiconductor chips.

What you'll be doing:

+ As a key member of the DFX methodology team, you will be responsible for the architecture, design, implementation and verification of fuse controller and other DFT IPs for our next generation products

+ Build architectural trade-offs based on features, performance requirements and system limitations.

+ Comfortable working with RTL and debugging tools

+ Work with other architects, platform and software teams to define feature set for future designs.

+ Collaborate and coordinate with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams

+ Work on generating test plans and verification infrastructure and tests. Support functional and DFT full chip level verification efforts

+ Support post-silicon bring up and validation activities

+ Help mentor junior engineers on test designs and trade-offs including cost and quality.

What we need to see:

+ Master’s Degree or equivalent experience in Electrical Engineering

+ 5+ years of meaningful experience in SOC architecture and design experience.

+ Experience in micro-architecture and RTL development (Verilog). Verification experience using UVM is a plus.

+ Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs using vendor tools

+ Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs

+ Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development

+ Strong programming and scripting skills in Perl, Python or Tcl desired

+ Exceptional written and oral interpersonal skills with the curiosity to work on rare challenges

NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most brilliant and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.

The base salary range is 168,000 USD - 264,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) . NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.