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About the Job You’re Considering

Join us as a Memory Layout Engineer, where you'll collaborate closely with SoC partners to craft innovative SRAM and Register File layout designs. You'll play a key role in design reviews, contributing to the continuous improvement of memory layout quality and performance.

Your Role

+ Design and implement custom memory layouts for advanced technology nodes, working hand-in-hand with circuit designers to optimize for performance, power, and area.

+ Proactively address layout design challenges such as N-well proximity effects, diffusion spacing, and length of diffusion impacts.

+ Stay current with evolving industry trends and breakthroughs in memory layout design.

+ Conduct physical verification (LVS, DRC, ANT, etc.) and troubleshoot layout issues to ensure robust designs.

+ Lead and mentor junior layout engineers, fostering a collaborative and growth-oriented environment.

+ Manage project timelines effectively, ensuring timely and high-quality deliverables.

+ Communicate clearly with design teams to align layout execution with schematic design intent.

+ Adapt seamlessly across manufacturing nodes with minimal ramp-up time.

Your Skills and Experience

+ 7 years of experience in analog/mixed-signal layout design for deep submicron CMOS circuits, with at least 3 years on advanced nodes including FinFET technologies.

+ Proficiency in Synopsys/Cadence Analog Layout Tools, memory design and layout, and Python.

+ Strong grasp of CAD flows and tools for analog/mixed-signal layout design.

+ Excellent programming skills in SKILL and Perl; Python experience is a plus.

+ Solid foundation in software development principles.

+ Hands-on experience with EMIR (RV), physical design verification (DRC/LVS/PEX/ERC), and waiver processes.

+ Working knowledge of circuit design fundamentals including device characteristics, SPICE and Verilog netlists, and simulation techniques

Life at Capgemini

Capgemini supports all aspects of your well-being throughout the changing stages of your life and career. For eligible employees, we offer:

+ Flexible work

+ Healthcare including dental, vision, mental health, and well-being programs

+ Financial well-being programs such as 401(k) and Employee Share Ownership Plan

+ Paid time off and paid holidays

+ Paid parental leave

+ Family building benefits like adoption assistance, surrogacy, and cryopreservation

+ Social well-being benefits like subsidized back-up child/elder care and tutoring

+ Mentoring, coaching and learning programs

+ Employee Resource Groups

+ Disaster Relief

About Capgemini Engineering

World leader in engineering and R&D services, Capgemini Engineering combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the Group, it helps clients to accelerate their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries across sectors including Aeronautics, Space, Defense, Naval, Automotive, Rail, Infrastructure & Transportation, Energy, Utilities &

Chemicals, Life Sciences, Communications, Semiconductor & Electronics, Industrial & Consumer, Software & Internet.

Capgemini Engineering is an integral part of the Capgemini Group, a global business and technology transformation partner, helping organizations to accelerate their dual transition to a digital and sustainable world, while creating tangible impact for enterprises and society. It is a responsible and diverse group of 340,000 team members in more than 50 countries. With its strong over 55-year heritage, Capgemini is trusted by its clients to unlock the value of technology to address the entire breadth of their business needs. It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI, generative AI, cloud and data, combined with its deep industry expertise and partner ecosystem. The Group reported 2024 global revenues of €22.1 billion.

Get the future you want | www.capgemini.com

Disclaimer

Capgemini is an Equal Opportunity Employer encouraging diversity in the workplace. All qualified applicants will receive consideration for employment without regard to race, national origin, gender identity/expression, age, religion, disability, sexual orientation, genetics, veteran status, marital status or any other characteristic protected by law.

This is a general description of the Duties, Responsibilities and Qualifications required for this position. Physical, mental, sensory or environmental demands may be referenced in an attempt to communicate the manner in which this position traditionally is performed. Whenever necessary to provide individuals with disabilities an equal employment opportunity, Capgemini will consider reasonable accommodations that might involve varying job requirements and/or changing the way this job is performed, provided that such accommodations do not pose an undue hardship.

Capgemini is committed to providing reasonable accommodations during our recruitment process. If you need assistance or accommodation, please reach out to your recruiting contact.

Please be aware that Capgemini may capture your image (video or screenshot) during the interview process and that image may be used for verification, including during the hiring and onboarding process.

Click the following link for more information on your rights as an Applicant http://www.capgemini.com/resources/equal-employment-opportunity-is-the-law

Applicants for employment in the US must have valid work authorization that does not now and/or will not in the future require sponsorship of a visa for employment authorization in the US by Capgemini.

**Job:** _Developer_

**Organization:** _ERD PPL US_

**Title:** _Senior Memory Layout Engineer_

**Location:** _MN-Minneapolis_

**Requisition ID:** _080736_