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Change the world. Love your job.

This is an exciting, rewarding, yet challenging opportunity to contribute as Senior Test Engineer which involves the following responsibilities:

+ Collaborating and working closely with Process and stakeholders to develop characterization and test plans to support early Process Technology nodes development and ramp.

+ Silicon validation & characterization during development phase to include an understanding of performance and yield opportunities for improvement.

+ Comprehensive device debugging, design, process validation and failure analysis

+ Work with failure analysis (FA) to determine root cause of any reliability and qualification failures

Why TI?

+ Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.

+ We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI (https://edbz.fa.us2.oraclecloud.com/hcmUI/CandidateExperience/en/sites/CX/pages/4012)

+ Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, personal electronics, communications equipment and enterprise systems. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to race, color, religion, creed, disability, genetic information, national origin, gender, gender identity and expression, age, sexual orientation, marital status, veteran status, or any other characteristic protected by federal, state, or local laws.

If you are interested in this position, please apply to this requisition.

Minimum requirements:

+ Bachelor's degree in Electrical Engineering

+ Minimum 5 years of analog circuit or mixed signal circuit test experience

+ Solid understanding of analog test techniques and test experience in mixed signal and analog circuits.

+ Knowledgeable of electronic devices and circuits: basic understanding of building blocks like LDO, Bandgap, Ring Oscillators, VCOs, Operational Amplifier etc.

+ Proven track record with ATE hard- and software development (wafer sort and package level)

+ Knowledge of PCB design and experience with Cadence Allegro schematic tools and usage

+ ATE Test Fluency and Experience in Teradyne ETS364 (ETS800 test experience is a plus)

+ Defining test system requirements from device test specifications

+ Experience in Pre Si-Test Activities including Hardware design and Software readiness, provide insights to design team for robust test

+ Experience in test debugging and test time reduction

+ Experience with various lab equipment such as scopes, power supplies, source meters, loads etc.

Preferred qualifications:

+ Data analysis skills and yield reporting using MBayse, Spotfire, Jump, MatLab

+ Strong time management skills that enable on-time project delivery

+ Capability to drive and lead a project -Ability to take the initiative and drive for results

+ Demonstrated strong interpersonal, analytical and problem-solving skills

+ Ability to quickly ramp on new systems and processes

+ Ability to work in a team setup comprising of other functional groups

+ Demonstrated ability to build strong, influential relationships

+ Ability to multiplex between projects and be able to maintain project schedules

**ECL/GTC Required:** Yes