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Senior Principal Emulation Design Engineer
- Cadence Design Systems, Inc. (San Jose, CA)
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Design Engineer – Emulation & High-Speed Interfaces
Palladium Solutions Development
Why Join Us
We’re building the next generation of full system emulation and verification solutions—and we’re looking for a seasoned Design Engineer to help lead the way. If you’re passionate about high-speed interfaces, system-level verification, and solving complex engineering challenges at scale, this is an opportunity to make a real impact on industry-defining technology.
You’ll work hands-on with Palladium and Protium emulation platforms, developing high-fidelity models and end-to-end verification environments that enable early software bring-up and accelerate silicon success.
What You’ll Do
+ Lead the development and deployment of PHY logic and interface models for emulation platforms including Palladium and Protium
+ Design, integrate, and validate high-speed interface subsystems (SerDes, chip-to-chip links) in full-system emulation environments
+ Develop end-to-end verification flows, including:
+ System-level modeling (microcontrollers, memories, NoC, controllers, MACs)
+ Custom test case development and automation
+ Interface performance analysis and validation
+ Convert Analog/Mixed-Signal (AMS) parallel and serial models into emulation-ready implementations with functional and bit accuracy
+ Enable bare-metal driver validation and early software stack development in emulation
+ Collaborate with architecture, IP, verification, and software teams to ensure smooth transitions from simulation to emulation
+ Optimize multi-clock domain designs for accuracy, performance, area, and runtime
+ Drive innovation in emulatable IP and AVIP solutions, influencing next-generation verification methodologies
+ Support system prototyping and early bring-up for complex SoC designs
What You Bring
Required Qualifications
+ Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
+ 7–15 years of experience in system-level design, verification, or emulation
+ Strong experience with high-speed communication protocols, including:
+ PCIe, UCIe, Ethernet, UALink, DDR, USB, SPI, JTAG, AMBA
Proven expertise in:
+ SystemVerilog for synthesizable RTL design
+ C and Python for modeling, scripting, automation, and test development
+ Converting AMS designs into emulation models supporting configuration, control, and status monitoring
+ Lab debug, performance analysis, and test case development
+ Hands-on experience with emulation and prototyping platforms, such as:
+ Palladium, Protium, Zebu, HAPS, Veloce, FPGA
+ Strong understanding of verification flows, emulation acceleration, and hardware/software co-verification
Nice to Have
+ Experience building Acceleratable Verification IP (AVIP)
+ Familiarity with end-to-end verification environments from simulation through emulation
+ Background in system prototyping, SoC bring-up, and pre-silicon validation
+ Strong analytical, debugging, and problem-solving skills
+ Excellent communication, collaboration, and technical leadership abilities
Make an Impact!
We’re doing work that matters. Help us solve what others can’t.
Join a team where your expertise directly shapes how complex systems are verified, validated, and brought to life.
The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
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Equal Employment Opportunity Policy:
Cadence is committed to equal employment opportunity throughout all levels of the organization.
+ Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en\_US/documents/company/careers/equal-employment-opportunity-policy.pdf)
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Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For.
Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.
Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.
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Recent Jobs
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Senior Principal Emulation Design Engineer
- Cadence Design Systems, Inc. (San Jose, CA)