• Senior ASIC Design Verification…

    Google (Sunnyvale, CA)
    …at RTL using SystemVerilog for ASICs. + Experience in memory subsystem design verification. + Experience in Power aware verification, Gate level simulations, and ... Post silicon bring-up. + Familiarity with ASIC standard interfaces and memory system architecture. In this...behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs,… more
    Google (04/25/25)
    - Related Jobs
  • ASIC Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... techniques to improve RTL code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and ASIC more
    Google (04/10/25)
    - Related Jobs
  • ASIC Engineer , Emulation

    Meta (Sunnyvale, CA)
    …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Develop emulation testbenches in System ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...SOC interfaces. 7. Develop emulation validation components for validation efficiency in testing, debug and automation. 8. Develop and… more
    Meta (04/17/25)
    - Related Jobs
  • Senior ASIC Power Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (04/23/25)
    - Related Jobs
  • Senior ASIC Front End Infrastructure…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
    NVIDIA (04/30/25)
    - Related Jobs
  • ASIC Engineer , Test and Build…

    Meta (Sunnyvale, CA)
    …our architecture function and performance models. **Required Skills:** ASIC Engineer , Test and Build Infrastructure Responsibilities: 1. Design , develop, and ... **Summary:** Meta is seeking a highly skilled Engineer to join our Infra Silicon Architecture team,...process 5. Optimize build times and improve overall build efficiency 6. Troubleshoot and debug issues related to testing… more
    Meta (05/14/25)
    - Related Jobs
  • Senior Software Engineer , ASIC

    NVIDIA (Santa Clara, CA)
    …years of EDA tool development in the verification field + Hands on experience with ASIC design and verification + Good with C++ and other programming languages ... engineers on project verification support + Develop new methodologies to improve verification efficiency and capacity + Co-develop EDA tools with our vendors to best… more
    NVIDIA (05/02/25)
    - Related Jobs
  • ASIC Design Verification…

    Broadcom (Irvine, CA)
    …Ethernet solutions that deliver unprecedented performance at critically important power efficiency ._** **_We are looking for highly skilled and efficient Constrained ... Random Design Verification engineers that want to verify new designs...of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products.… more
    Broadcom (04/29/25)
    - Related Jobs
  • VLSI Design Engineer for Server…

    Qualcomm (San Diego, CA)
    … techniques for speed and for power efficiency + Oversee definition, design , verification, and documentation for ASIC development for a variety of products ... Science, or Computer Engineering + 8+ years of relevant experience in ASIC design , scripting and architecture **Minimum Qualifications:** * Bachelor's degree… more
    Qualcomm (05/16/25)
    - Related Jobs
  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Job Summary:** We are seeking a skilled CAD Infrastructure engineer to support our ASIC design team. The ideal candidate will be responsible for developing ... ensuring the efficiency and effectiveness of the ASIC design process, making it an integral...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - CAD/EDA - Silicon Design /Verification Infrastructure… more
    Capgemini (05/02/25)
    - Related Jobs