- Microsoft Corporation (Mountain View, CA)
- …engineers to help achieve that mission. We are looking for a **Principal Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System ... globalization, and manageability solutions. Our focus is on smart growth, high efficiency , and delivering a trusted experience to customers and partners worldwide… more
- ManpowerGroup (Mountain View, CA)
- Our client, a leader in technology innovation, is seeking a Hardware Design Engineer 4 to join their team. As a Hardware Design Engineer 4, you will be ... abilities which will align successfully in the organization. **Job Title: Hardware Design Engineer 4** **Location: Mountain View, CA - Onsite** **Pay… more
- Meta (Menlo Park, CA)
- …maximum reliability, scalability, and efficiency . **Required Skills:** Network Production Engineer , Design Responsibilities: 1. Design network topologies ... at Meta are hybrid software and network engineers who design , build, and operate our worldwide Data Center network....Understanding of different Optics and internals of a switch ASIC 20. Familiarity with the Linux based systems **Public… more
- Microsoft Corporation (Mountain View, CA)
- …manage and optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer ** to join the team. **Responsibilities** + Establish ... manageability solutions. Our focus is on smart growth, high efficiency , and delivering a trusted experience to customers and...yourself as an integral member of a design verification team for the development of AI components… more
- Qualcomm (Santa Clara, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... create designs that push the envelope on performance, energy efficiency and scalability. **About The Role:** In this role...Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and… more
- Google (Sunnyvale, CA)
- …or equivalent practical experience. + 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced degree. + 3 years of ... experience in technical leadership. + Experience with power circuit design and signal integrity. **Preferred qualifications:** + PhD in Electrical Engineering,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …related experience in design and EDA (Digital Implementation/Signoff) + Understands ASIC Design implementation process and steps + Strong hands-on experience ... + Provide technical support to Cadence customers in the areas of Digital Design Implementation & Signoff including Synthesis, Place and Route, Design Closure,… more
- NVIDIA (Santa Clara, CA)
- …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- NVIDIA (Santa Clara, CA)
- …Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, Product teams and Physical Design ... for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- Qualcomm (San Diego, CA)
- …the face of obstacles + Strong knowledge and experience on all aspects of ASIC design flow (Arch, uArch, RTL, model, verification, synthesis, physical design ... best GPUs possible, for all markets. **Role** The Project Engineer (PE) is the overall technical lead for a...knowledge in at least one of the aspects of ASIC design listed above + Breadth of… more