- Google (Mountain View, CA)
- …PnR, sign-off convergence, including STA and sign-off. Preferred qualifications: + Experience with ASIC design flows and methodology of Physical design . + ... field, or equivalent practical experience. + 4 years of experience in Physical Design . + Experience in one or more synthesis/PnR tools (eg, Genus, Innovus, DC,… more
- Google (Sunnyvale, CA)
- …TPU architecture and its integration within AI/ML-driven systems. As a Custom Datapath Physical Design Engineer on the Chip Implementation team, you will work on ... equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced... of the next generation of our chips, unlocking design efficiency that is not attainable with… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs ... to create the package structures needed to enable new design , and contribute to efficiency improvements for...for our design team. **RESPONSIBILITIES:** . Overall design responsibility for ASIC package designs and… more
- Meta (Sunnyvale, CA)
- …(Power, Performance, and area) of the design . **Required Skills:** Silicon Physical Design Engineer Responsibilities: 1. Develop and own physical design ... relevant technical field, or equivalent practical experience. 7. 10+ years of experience in ASIC Physical Design 8. Understanding of RTL2GDSII flow and design… more
- Qualcomm (San Diego, CA)
- …transformation to help create a smarter, connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC design ... resolve design issues. In this role of Design Verification Engineer , you will be using...Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as...you'll be doing: + You will be working with ASIC controller teams to define a unified interface +… more
- Qualcomm (Folsom, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... create designs that push the envelope on performance, energy efficiency and scalability. **About The Role:** In this role...Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and… more
- Google (Sunnyvale, CA)
- …or equivalent practical experience. + 6 years of experience working in a hardware systems design , or 5 years of experience with an advanced degree. + 3 years of ... experience in technical leadership. + Experience with power circuit design and signal integrity. Preferred qualifications: + PhD in...DDR, Ethernet, USB, SPI etc. As a Staff Hardware Engineer , you will work on Machine Learning/AI hardware systems… more
- Google (Sunnyvale, CA)
- …analysis and timing ECO creation, timing margins). + Experience with Electronic Design Automation (EDA) tools (ie, Primetime, Tempus, Timevision, STAR-RC) and EDA ... static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful tape-outs and shipping… more
- NVIDIA (Santa Clara, CA)
- …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more