• ASIC Engineer , Formal

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
    Meta (08/01/25)
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  • ASIC Engineer , Network Design…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Network Design Verification ...or more of the following areas along with functional verification -SV Assertions, Formal , Emulation 12. Experience in… more
    Meta (09/30/25)
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  • ASIC Engineer , Design…

    Meta (Sacramento, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (08/29/25)
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  • ASIC Engineer , Design…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities:...or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 14.… more
    Meta (08/01/25)
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  • ASIC Engineer , Design…

    Meta (Sunnyvale, CA)
    **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and… more
    Meta (09/04/25)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage… more
    NVIDIA (09/23/25)
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  • Staff ASIC Design Verification

    Google (Mountain View, CA)
    Staff ASIC Design Verification Engineer , Platforms and Devices + _link_ Copy link + _email_ Email a friend _corporate_fare_ Google _place_ Mountain View, CA, ... emphasis on computer architecture. + 12 years of experience with building verification methodologies that span simulation, formal , emulation and FPGA… more
    Google (10/01/25)
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  • Senior ASIC Design Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... silicon correlation. + Own the unit and sub-system level verification of various IPs, create functional test plans, and...as VCS-XA or equivalent tools, Gate Level Simulation or Formal Equivalence domains. + Proficiency in scripting language, such… more
    NVIDIA (09/04/25)
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  • Sr. ASIC Design Verification

    Amazon (San Diego, CA)
    …in the validation of FPGAs using test benches, which can be reused for the ASIC implementation . Run formal verification of complex blocks to ensure ... of experience in emulation - Familiarity with Matlab - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
    Amazon (09/16/25)
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  • ASIC /SOC DFT Engineer (Silicon…

    SpaceX (Sunnyvale, CA)
    …of design blocks using Verilog/SystemVerilog + Familiar with UPF (unified power format), formal verification , and DRC rule checking experience + Ability to work ... ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale,...weekends as needed COMPENSATION AND BENEFITS: Pay range: Design Verification Engineer /Level I: $130,000.00 - $155,000.00/per year… more
    SpaceX (09/18/25)
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