• Senior ASIC Verification

    Amazon (San Diego, CA)
    …run regressions, collect coverage matrices and report progress to the program * Run formal verification of complex blocks to ensure functional correctness * Work ... (DSP or MODEM) implementations * Familiarity with Matlab * Familiarity with formal verification techniques * Strong written and verbal skills Amazon is an equal… more
    Amazon (07/01/25)
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  • ASIC Verification Engineer

    Amazon (Sunnyvale, CA)
    …digital verification , preferably in areas of image processing. - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
    Amazon (06/04/25)
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  • Senior ASIC Design Engineer

    Cisco (San Jose, CA)
    …concepts + Scripting experience (Python, Perl, TCL, shell programming) + Experience with formal verification tools + Experience with emulation **Why Cisco?** At ... Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806) +...and support our design methodology. + Collaborate with the verification team to address design bugs and close code… more
    Cisco (07/11/25)
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  • ASIC Design Engineer - Design…

    Cisco (San Jose, CA)
    …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... ASIC Design Engineer - Design &...with Spyglass CDC and glitch analysis + Experience using Formal Verification : Synopsys Formality and Cadence LEC.… more
    Cisco (06/25/25)
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  • ASIC Methodology/CAD Engineer

    Amazon (Sunnyvale, CA)
    … development in a production setting - Experience with UVM - Familiarity with formal verification techniques - Familiarity with the TCL programming language - ... Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that improve the… more
    Amazon (06/11/25)
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  • Senior ASIC Synthesis Engineer

    NVIDIA (Santa Clara, CA)
    …in low-power and high-performance design optimization techniques. + Familiarity with formal verification tools (eg, Formality/Conformal LEC) and methodologies. ... generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic...across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing correctness What… more
    NVIDIA (07/01/25)
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  • ASIC Implementation Engineer

    Meta (Sunnyvale, CA)
    …Estimation at RTL and Gate Level and identify power reduction opportunities 4. Run Formal Verification checks between RTL and Gate level netlist and debug the ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical… more
    Meta (07/15/25)
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  • ASIC Design Engineer

    Broadcom (San Jose, CA)
    …* Synthesis using Synopsys tool suite * Timing Analysis using Synopsys Primetime tool * Formal Verification * DFT concepts of Scan, BIST. * Strong Perl and Tcl ... challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from… more
    Broadcom (04/26/25)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... and the latest process technologies. + Work on functional verification , perform CDC checks and formal equivalence....ASIC design flow including front end design and verification , DFT, timing analysis, ECO, ATE test development, post-si… more
    NVIDIA (05/30/25)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …as machine learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD… more
    Meta (07/12/25)
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