• Senior ASIC Design Engineer…

    Amazon (San Diego, CA)
    …. Familiarity with UVM and Matlab . Ability to write assertions and exposure to Formal verification . Strong written and verbal skills Amazon is an equal ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...the correctness of your block . Work with the verification team and participate in System level verification… more
    Amazon (07/09/25)
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  • Analog/ ASIC , Account Technical Executive

    Cadence Design Systems, Inc. (Irvine, CA)
    …core technology requirements in the custom/analog and digital implementation and/or functional/ formal verification space, coordination of sales strategies and ... & route and signoff) and/or experience with functional and formal verification tools/methodology, VIP. Understanding of semiconductor...in sales and account management or as a Applications Engineer or Design Engineer with proven track… more
    Cadence Design Systems, Inc. (08/22/25)
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  • Custom SOC IP Verification Engineer

    NVIDIA (Santa Clara, CA)
    …cycles, this is your place to be. This role specifically requires a skilled ASIC Verification Engineer with expertise in cache coherency protocols and ... NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next...UVM, and C++, along with a solid grasp of ASIC verification methodologies. What you'll be doing:… more
    NVIDIA (09/25/25)
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  • Design Verification Engineer

    Arrow Electronics (Mountain View, CA)
    **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ... ASIC SoC and providing verification support from defining verification plan to...technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal… more
    Arrow Electronics (09/25/25)
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  • Silicon Verification Engineer

    ManpowerGroup (Mountain View, CA)
    …Mountain View, CA **What's the Job?** + Focus on verifying the design of the ASIC /SoC using simulation, formal verification , and emulation. + Utilize tools ... a leader in technology innovation, is seeking a Silicon Verification Engineer to join their team. As...digital design principles and computer architecture. + Experience with formal verification tools and methodologies. **What's in… more
    ManpowerGroup (08/20/25)
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  • Sr. Physical Design Engineer , Annapurna…

    Amazon (Cupertino, CA)
    …tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) develop flows for synthesis, formal verification , floor planning, bus / pin planning, place and ... massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and… more
    Amazon (09/02/25)
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  • Sr. Physical Design Methodology Engineer…

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new ... physical design, and methodologies including synthesis, place and route, STA, IR, formal and physical verification . - Demonstrated level of expertise in PD… more
    Amazon (07/26/25)
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  • SDC Engineer (eInfochips Inc)

    Arrow Electronics (San Jose, CA)
    …Cadence) + Experience with Spyglass CDC and glitch analysis + Experience using Formal Verification : Synopsys Formality and Cadence LEC. + Experience with ... **Position:** SDC Engineer (eInfochips Inc) **Job Description:** **Position: SDC ...in Electrical or Computer Engineering with 7+ years of ASIC or related experience or Master's Degree in Electrical… more
    Arrow Electronics (09/05/25)
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  • Digital FPGA Engineer Level 4 (AHT)

    Northrop Grumman (Los Angeles, CA)
    …generators + Generation of complex test benches in Modelsim or QuestaSim to support formal Verification + Familiarity with the VxWorks RTOS, its architecture and ... Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 4** with the desire to learn new...innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process.… more
    Northrop Grumman (09/07/25)
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  • Digital FPGA Engineer Level 3 (AHT)

    Northrop Grumman (Acton, CA)
    …as oscilloscopes and logic analyzers. + Generation of Test Benches and support of formal VHDL Verification + Experience in high-speed FPGA implementation such as ... Grumman's Defense Systems** is currently seeking a **Digital FPGA Engineer ** **Level 3** with the desire to learn new...innovation. The selected individual will work on FPGA and ASIC Design across the full product life cycle process.… more
    Northrop Grumman (09/25/25)
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