- Meta (Salem, OR)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide… more
- Amazon (Portland, OR)
- …block and Sub System level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and route, ... Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our...Graphics, Synopsys, or Others) to block design for synthesis, formal verification , floor planning, bus / pin… more
- Microsoft Corporation (Hillsboro, OR)
- …+ Conduct synthesis, linting, Clock Domain Crossing (CDC) analysis, and Formal Equivalence Verification (FEV). + Support System-on-Chip (SoC) integration ... to help achieve that mission. We are looking for a **Senior** **Design Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISoC)… more
- Amazon (Portland, OR)
- …powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. We are a part of ... * Flow for STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip / Sub-System STA and… more