- NVIDIA (Santa Clara, CA)
- …experience in Mask and Layout Design. + Deep understanding of analog circuit layout concepts in submicron CMOS technologies. + You are an authority with ... This is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking… more
- Micron Technology, Inc. (Folsom, CA)
- …and cross-functional communication. **Qualifications** + 10+ years of experience in analog/custom layout design across advanced CMOS nodes (Planar, FinFET). + ... Technology's HBM team in Folsom, California is seeking a highly experienced **Custom Layout and High-Speed I/O Design Engineer** to help shape the future of memory… more
- NVIDIA (Santa Clara, CA)
- …a member of our Mixed Signal team, you will lead the design of CMOS high-speed interface circuits and mixed-signal circuits. Strong hands-on experience in the lab ... circuits + Supervise closely IC circuit/mask designers, provide floorplan and layout guidelines + Support lab characterization of silicon + Tackle challenges… more
- Micron Technology, Inc. (San Jose, CA)
- …the development of new memory products by assisting with the overall design, layout , and optimization of datapath circuits for NAND flash memory. This senior-level ... parasitics and optimize signal quality in close collaboration with layout teams + Optimize circuit design based on a...Optimize circuit design based on a comprehensive understanding of CMOS technology and reliability + Document and review final… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …with specialization in analog microelectronics . Minimum 8 years of experience in CMOS SerDes or high-speed I/O IC design and development (≥16Gb/s) and in ... . Proficiency in using CAD tools for circuit simulation, layout , and post- layout verification . Other non-requirements...d'experience dans la conception et le developpement de SERDES CMOS ou de circuits integres I/O a haute-vitesse (≥16… more
- NVIDIA (Santa Clara, CA)
- …and self-driving cars. Our teams focus is on architecture and design of CMOS high-speed chip interfaces and complex analog functions. Come join our dynamic team! ... implement high speed interfaces and complex mixed-signal circuits using state-of-the-art sub-micron CMOS technologies and various EDA tools: + High speed analog and… more
- Amazon (San Diego, CA)
- …you will be responsible for the architectural definition, design, simulation, layout , and extracted simulation for transmit and receive mixed-signal circuit blocks ... DACs & ADCs and other analog/mixed-signal blocks in deeply scaled CMOS technologies. * Explore circuit architectures for power/area/performance trade-offs. * Perform… more
- NVIDIA (Santa Clara, CA)
- …outstanding products. Teams are dedicated to the architecture and design of CMOS and Silicon-Photonics high-speed chip interfaces (NVLink, IEEE, PCIE, USB, OIF) and ... you will be doing: + Develop and implement physical design and layout methodologies for integrated photonic devices focused on high-speed optical interconnect and… more
- NVIDIA (Santa Clara, CA)
- …Help by defining circuit requirements and complete design from schematic, layout , and verification to characterization. + Conduct schematic design of deep-submicron ... CMOS technologies using Spectre, Hspice or like. + Take...the specifications for system performance. + Work closely with layout engineers by providing detailed floorplan and guidance for… more
- NVIDIA (Santa Clara, CA)
- …Help by defining circuit requirements and complete design from schematic, layout , and verification to characterization. + Conduct schematic design of deep-submicron ... CMOS technologies using Spectre, Hspice or like. + Take...the specifications for system performance. + Work closely with layout engineers by providing detailed floorplan and guidance for… more