• Lead Analog IC Designer

    Cadence Design Systems, Inc. (San Jose, CA)
    …+ Candidate's background should include a minimum of 3 years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a ... + Position requires proficiency in using CAD tools for circuit simulation, layout , and physical verification + Cadence tool experience, lab test experience, and… more
    Cadence Design Systems, Inc. (12/05/25)
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  • FPGA Design Engineer

    Applied Materials (Santa Clara, CA)
    …PL. * Implement high-speed IO to realize data transfer between different FPGAs. ** CMOS Sensor & Image Processing** * Integrate and interface camera sensor in FPGA. ... IOs, I2C, UART, SPI. * Work closely with hardware engineers on schematics, layout reviews, and FPGA pin assignment planning. * Support signal integrity, timing, and… more
    Applied Materials (11/27/25)
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  • Principal RFIC Design Engineer

    SpaceX (Hawthorne, CA)
    …and circuits + Develop analog/mixed-signal/RF/microwave circuits in SiGe, GaAs, GaN, or CMOS processes + Work with system architects, modem/DSP and ASIC engineers to ... between hardware and software domains + Perform IC floor planning and layout + Own packaging prototypes, product development, and release to production. Model… more
    SpaceX (11/25/25)
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  • Engineer RF Microwave Design

    Northrop Grumman (Mcclellan, CA)
    …(RQL). On a gate-for-gate basis, RQL consumes orders of magnitude less power than CMOS while running at significantly higher clock speeds. As an RF Design Engineer ... and verifying RF, microwave, and mixed signal subsystem assemblies + Guide layout of Printed Wiring Boards (PWB) with component placement, interconnect routing and… more
    Northrop Grumman (10/04/25)
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  • RFIC Design Engineer (Silicon Engineering)

    SpaceX (Irvine, CA)
    …subsystems and circuits + Develop Analog/Mixed-Signal/RF/microwave circuits in SiGe or CMOS processes + Work with system architects, modem/DSP and ASIC engineers ... functions between hardware and software domains + Perform IC floor planning and layout + Model package and external parasitic components + Evaluate and characterize… more
    SpaceX (10/04/25)
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