• Sr. ASIC Design Engineer…

    Amazon (Austin, TX)
    … quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area and ... power-efficient RTL designs to meet project specifications and targets *...and Be Curious" mindset - Have familiarity with accelerator design , interconnects, DMAs, Memory sub-systems, CPU cores,… more
    Amazon (09/13/25)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …learning, video transcoding and network acceleration. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration 7. RTL development using Verilog, System Verilog and… more
    Meta (09/26/25)
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  • ASIC Engineer , Design

    Meta (Austin, TX)
    …SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (07/28/25)
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  • Front End Lead

    Cadence Design Systems, Inc. (Austin, TX)
    …creation and/or SoC and IP ( CPU , Memory, Interface) integration *Expert in RTL design (Verilog), simulators debuggers *Hands on Experience in Synthesis, SDC ... challenging and rewarding opportunity is for a highly motivated engineer with a passion for innovation and a proven...for: Technical Leadership: Guide and mentor a team of RTL design engineers, fostering a collaborative and… more
    Cadence Design Systems, Inc. (09/24/25)
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