• Process Engineer II - (E2)

    Applied Materials (Hudson, MA)
    …compound areas working experience. **Preferred Experiences** + Applied Materials 200mm ETCH, CVD , PVD, or RTP process , hardware, and facilitation background. ... and external documentation for products, presentations, technical reports and generate process engineering specifications. + Drive the adoption of new technology at… more
    Applied Materials (06/28/25)
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  • Principal Chemical Process Engineer…

    WGNSTAR (Billerica, MA)
    …precursors. These materials are used in critical applications including semiconductor ALD/ CVD thin films, functional coatings, and advanced catalysis. Location: WI - ... for deviations, contamination, and yield loss + Support SPC/SQC implementation and process control for HVM readiness + Ensure EHS compliance in hazardous chemistries… more
    WGNSTAR (07/30/25)
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  • Electronic-Photonic Process Design Kit…

    MIT Lincoln Laboratory (Lexington, MA)
    …metalorganic chemical vapor deposition (MOCVD), diamond chemical vapor deposition ( CVD )) and fabrication * Microsystems Integration Facility (MIF): Packaging and ... multi-disciplinary team responsible for implementing, applying, maintaining, and maturing process design kits (PDKs) for silicon-based, compound-semiconductor, and heterogeneous/hybrid… more
    MIT Lincoln Laboratory (05/09/25)
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  • Operations Engineer

    Massachusetts Institute of Technology (Cambridge, MA)
    Operations Engineer + Job Number: 25034 + Functional Area: Research - Engineering + Department: MIT.nano + School Area: VP Research + Employment Type: Full-Time + ... Schedule: Email a Friend Save Save Apply Now Posting Description OPERATIONS ENGINEER , MIT.nano, will be responsible for operation, training and maintenance of… more
    Massachusetts Institute of Technology (07/03/25)
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  • Integrated Circuit (IC) Layout and Mask Design…

    MIT Lincoln Laboratory (Lexington, MA)
    …metalorganic chemical vapor deposition (MOCVD), diamond chemical vapor deposition ( CVD )) and fabrication * Microsystems Integration Facility (MIF): Packaging and ... radiation-hard CMOS, and other emerging integrated circuit technologies. The engineer will work in the Cadence environment, with which...full mask reticles based on input from device and process designers. They will also be responsible for working… more
    MIT Lincoln Laboratory (05/29/25)
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