- Meta (Sunnyvale, CA)
- …for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power). 9. Work closely with the Design Engineers , DV Engineers , Emulation Engineers in ... supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion...of experience as a Front End Synthesis & Integration Engineer 11. Experience with RTL Synthesis and design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …innovators who want to make an impact on the world of technology. Principal DV Engineer + As a member of the Design Verification Team for Xtensa ... RTL and EDA teams. Required Skills and Experience: + 8+ years of design verification experience. Experience in mentoring junior engineers (or) leading a… more
- Meta (Sunnyvale, CA)
- …fast changing consumer electronics field. 14. Knowledge of chip architecture, uArchitecture, design and UVM design verification experience. **Public ... some of the following; FPGA platforms, boards, sensors, displays, RTL design / verification , CV/ML/Gfx algorithms, virtual platforms, OS/RTOS kernel, driver… more
- Meta (Sunnyvale, CA)
- …various partition blocks. 12. Develop automation scripts and methodology for FE-tools. 13. Support design engineers , DV engineers , and emulation ... to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization… more
- Cisco (San Jose, CA)
- …will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with cross-functional software and product ... In this role as a Silicon Validation and Application Engineer you will be responsible for : * ASIC...schedulers, buffers, traffic manager etc. * Experience with ASIC Design verification , silicon bring-up, and post silicon… more
- Arrow Electronics (San Jose, CA)
- …validation. **What we are looking for:** + 7+ years of overall experience in design verification or related domains. + Hands-on experience in emulation, using ... **Position:** Emulation Engineer - HAPS 100 (Einfochips Inc.) **Job Description:** **What...to the testbench architecture for IP/SoC-level validation. + Perform Design Functional Verification using System Verilog and… more
- Capgemini (San Jose, CA)
- **About the job you're considering** As a Software Infrastructure Engineer , you will be part of the End-to-End (E2E) System and Infrastructure team at RL Silicon. ... focus on building, scaling, and maintaining laboratory software infrastructure for FW/SW/ DV development and system integration on both pre-silicon and post-silicon… more
- Cisco (San Jose, CA)
- …company in the world. You will engage in dynamic collaboration with verification engineers , designers, and cross-functional teams, working together to ensure ... ASIC bring up Minimum Qualifications: * 10+ years ASIC design verification experience with a bachelor's or...Preferred Qualifications: * Prior experience leading a team of engineers to complete verification of a complex… more
- Cisco (San Jose, CA)
- …ability to map multi-million gate SoCs to FPGAs. You will collaborate closely with Design , DV , and Software teams to understand chip architecture and effectively ... leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and a...block or top-level IP integration * Collaborate with Software, Design , and Verification teams to validate the… more
- Ford Motor Company (Palo Alto, CA)
- …ready to change the way the world moves? Ford's Electric Vehicles, Digital and Design (EVDD) team is charged with delivering the company's vision of a fully electric ... team to meet their committed deliverables as well as working with the engineers , technical leads, and managers across the broader organization to assess risk,… more
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