• ASIC Engineer, Formal Verification

    Meta (Austin, TX)
    **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... to build IP and System On Chip (SoC) for data center applications. As a Formal Verification Engineer, you will be part of a team working with the best in the… more
    Meta (08/01/25)
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  • Senior Design Verification Engineer

    Microsoft Corporation (Austin, TX)
    …such as Python or Perl + Hands-on experience in Formal property verification , formal verification of computational data path designs Silicon Engineering ... optimize the Cloud infrastructure. We are looking for a **Senior Design Verification Engineer** to join the team. **Responsibilities** + Perform pre-silicon … more
    Microsoft Corporation (09/26/25)
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  • Design Verification Engineer

    Arrow Electronics (Austin, TX)
    …functional and technical specification documents * Implement and maintain integrated end-to-end formal verification flow for the formal verification ... **Position:** Design Verification Engineer **Job Description:** Principal Accountabilities * Responsible for architecting Verification Environment for ASIC SoC… more
    Arrow Electronics (09/25/25)
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  • Principal Verification Engineer

    Microsoft Corporation (Austin, TX)
    …verification environments in industry standard languages like SVTB UVM or formal verification . **Other** **Requirements** **:** Ability to meet Microsoft, ... the Cloud infrastructure. We are looking for a **Principal** ** Verification ** **Engineer** to join the team. **Responsibilities** + Lead...to join the team. **Responsibilities** + Lead an SoC verification team, owning verification of SOC and… more
    Microsoft Corporation (09/26/25)
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  • Senior Verification Engineer

    Microsoft Corporation (Austin, TX)
    …verification environments in industry standard languages like SVTB UVM or formal verification . **Other Requirements:** Ability to meet Microsoft, customer ... the Cloud infrastructure. We are looking for a **Senior Verification Engineer** to join the team. **Responsibilities** + Establish...Establish yourself as an integral member of a pre-silicon verification team, owning verification of SOC and… more
    Microsoft Corporation (09/25/25)
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  • Sr. ASIC Design Verification Engineer…

    Amazon (Austin, TX)
    …. Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to ensure functional correctness . ... Matlab model : development or DV integration experience - Familiarity with formal verification techniques - Strong written and verbal skills Amazon is an equal… more
    Amazon (09/13/25)
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  • ASIC Verification Engineer, Blink/Ring ASIC…

    Amazon (Austin, TX)
    …preferably in areas of image processing. - Familiarity with Matlab - Familiarity with formal verification techniques - Lab debug experience and/or FPGA debug - ... highly differentiated silicon into Blink and Ring battery powered devices. Our verification team works on state-of-the art SoCs in a vertically integrated team… more
    Amazon (09/10/25)
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  • Design Verification Engineer, Annapurna ML

    Amazon (Austin, TX)
    …Electrical or Communications Engineering or a related field - Experience with formal verification techniques including abstraction and end-to-end checking - ... solutions achieve their desired functionality, developing and executing multi-faceted verification /validation plans, and measuring the teams progress towards our… more
    Amazon (10/02/25)
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  • ASIC Engineer, Network Design Verification

    Meta (Austin, TX)
    …Experience in one or more of the following areas along with functional verification -SV Assertions, Formal , Emulation 12. Experience in EDA tools and scripting ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are...with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The… more
    Meta (09/30/25)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    …13. Experience in one or more of the following areas along with functional verification - SV Assertions, Formal , Emulation 14. Experience in development of UVM ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are...with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The… more
    Meta (09/23/25)
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