• Sr. ASIC Modem Design Engineer, Project Kuiper

    Amazon (Austin, TX)
    …Familiarity with UVM and Matlab. . Ability to write assertions and exposure to Formal verification Amazon is an equal opportunity employer and does not ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...the correctness of your block. . Work with the verification team and participate in System level verification more
    Amazon (06/05/25)
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  • Principal Digital Engineer

    Renesas (Austin, TX)
    …timing analysis and creation of place and route constraints + Proficiency in formal verification , linting, and CDC/RDC checking + Knowledge of asynchronous clock ... and high-speed design concepts + Participate in design, architecture, and verification reviews + Oversee digital backend design, including synthesis, static timing… more
    Renesas (07/18/25)
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  • Low Power Design Engineer (San Diego/Austin)

    Qualcomm (Austin, TX)
    …TCL and Perl/Python * Familiarity with Synthesis, Static Timing Analysis and Formal Verification * Detail oriented with strong organizational, problem solving ... and will be responsible for all aspects of power estimation/implementation/ verification /minimization and associated methodology/flow development. The focus will be… more
    Qualcomm (05/29/25)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …NOC, Memory and Peripheral Subsystems 13. Experience with Synthesis, Timing Closure and Formal Verification Methodology 14. Master's or PhD degree in Electrical ... Soft and hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in test plan development and debug 6. Collaboration… more
    Meta (07/28/25)
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  • Network Engineer

    GovCIO (San Antonio, TX)
    …description, system planning and design, and ensures requirements comply through formal verification methods. Translates high level product development ... network services, equipment and devices. + Generates system level requirements verification procedures and customer acceptance test procedures. + Monitors system… more
    GovCIO (07/25/25)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …NOC, Memory and Peripheral Subsystems 9. Experience with Synthesis, Timing Closure and Formal Verification Methodology 10. Master's or PhD degree in Electrical ... 3. Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug 4.… more
    Meta (07/12/25)
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  • Software Engineer - Principal

    Siemens (Austin, TX)
    …related to SystemVerilog, Verilog, and VHDL.Exposure to Simulation technologies or Formal -based Verification methodologies is a plus.Education:A bachelor's or ... are seeking a highly motivated and experienced software engineer for our Small Verification - AI/ML Team with a strong background in AI/ML to join our… more
    Siemens (08/08/25)
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  • ASIC Implementation Engineer - Synthesis

    Meta (Austin, TX)
    …Estimation at RTL and Gate Level and identify power reduction opportunities 4. Run Formal Verification checks between RTL and Gate level netlist and debug the ... aborts, inconclusive and Logic Equivalency failures 5. Perform RTL Lint and work with the Designers to create waivers 6. Perform RTL DFT Analysis and improve the DFT coverage for Stuck-at faults 7. Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA… more
    Meta (07/20/25)
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  • Physical Design Methodology Engineer, Annapurna…

    Amazon (Austin, TX)
    …physical design flows, and methodologies including synthesis, place and route, STA, formal verification . - Proven track record of delivering metric driven ... PPA flow development and support. Preferred Qualifications - Demonstrated level of expertise in PD tools such as Innovus, ICC2, FusionCompiler, STA, and Sign-Off. - Experience in evaluating multiple vendor solutions and driving tool decisions. - Experience in… more
    Amazon (06/03/25)
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  • Senior Design Engineer

    Microsoft Corporation (Austin, TX)
    …+ Conduct synthesis, linting, Clock Domain Crossing (CDC) analysis, and Formal Equivalence Verification (FEV). + Support System-on-Chip (SoC) integration ... various subsystems. + Collaborate with cross-functional teams, including architecture, verification , and physical design, to ensure designs meet specifications and… more
    Microsoft Corporation (08/08/25)
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