• Principal FPGA Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …for simulation, Place and route + Experience in debugging FPGAs in the lab using Vivado hardware manager , debugging with firmware/software + Experience using ... also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive… more
    Cadence Design Systems, Inc. (07/09/25)
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