- Cisco (San Jose, CA)
- …teams to close fullchip timing in multiple timing modes. + Option to also do block level RTL design or block or top- level IP integration. + Helping develop ... ASIC Design Technical Leader - Design &...and quality of SDCs as early as possible in design cycle. + Reviewing block level SDCs...possible in design cycle. + Reviewing block level SDCs and clocking diagrams and mentor other RTL… more
- NVIDIA (Santa Clara, CA)
- …planning, redundancy/repair, testing, low-voltage operation, and DRC/DFM impact + Circuit Design : Transistor- level circuit design , layout implementation, ... (ATG) at NVIDIA is an organization of process, CAD, design , and test engineers that works closely with foundry...analysis, exploring device and wire models, as well as higher- level SRAM bitcell issues like Vmin, Vmax, and Iread… more
- The Boeing Company (El Segundo, CA)
- …verification, and delivery of developmental aerospace computing hardware, demonstrating a high level of design creativity and positive impact; applying expertise ... Weapons Systems has an exciting opportunity for a **Computer Architect/Embedded Computing Systems Design Engineer (Lead or Senior)** to join us as part of our SI&WS… more
- Google (Sunnyvale, CA)
- …and integration. As a SoC Design Engineer, you will join a team working on SoC- level RTL design for our data center accelerators. You will design RTL IP ... computer architecture. + 10 years of experience in ASIC design with 3 years of experience working on security...+ benefits. Our salary ranges are determined by role, level , and location. Within the range, individual pay is… more
- Abbott (Alameda, CA)
- …user and identifying opportunities for differentiation through design . + **Represent Design at the Leadership Level :** Communicate design vision, ... global healthcare leader. We are seeking an **Associate Director, Product Design ** to lead and scale our design function. This role is ideal for a strategic … more
- Celestica (San Jose, CA)
- …+ Perform hands-on lab tests of equipment from component to rack and facility level for design and model validation. Document thermal test plans, devise and ... Senior Lead Engineer, Hardware Design Req ID: 127717 Band: 09 Region: Americas...simulations, postprocessing, and analysis ranging from chip to facilities level to verify thermal feasibility, risk, and to inform… more
- Arrow Electronics (San Jose, CA)
- …to defining, evolving, and supporting our prototyping methodology. + **Option to engage in block- level RTL design or block or top- level IP integration.** + ... **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate...based upon geographic location, work experience, education, and/or skill level . The pay ratio between base pay and target… more
- The Boeing Company (Pleasanton, CA)
- …growth. Find your future with us. Boeing SCS is searching for an Electronics Design Engineer (Mid- Level or Senior) located in Pleasanton, CA. We are looking ... for you to bring your background in PCB design , and a passion for developing innovative electronic solutions....Support Sustaining Engineering efforts on existing Boeing PCB and system- level products. **This position is expected to be 100%… more
- BAE Systems (San Diego, CA)
- …your skills, and advancing your career. BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop ... non-monetary recognition awards. Other incentives may be available based on position level and/or job specifics. **Senior Principal Design Verification Engineer… more
- Microsoft Corporation (Mountain View, CA)
- … Design Engineer** to join the team. **Responsibilities** + Responsible for Physical Design tasks at block, sub-chip, and/or full-chip level , including: + ... engineering experience OR equivalent experience. + 7+ years of experience in Physical Design , specifically in place and route (PNR), Low Power Verification (LPV) and… more