• Senior Verification Engineer

    Microsoft Corporation (Mountain View, CA)
    …(CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state of the art custom computer chips, notably ... and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. **Responsibilities** The role will be responsible for… more
    Microsoft Corporation (12/17/25)
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  • Manufacturing Engineer

    Kelly Services (Irvine, CA)
    **Manufacturing Engineer ** + **Contract Duration:** 12 months - Estimated to end: 12/2026 ( Contract Extension possibilities and internal hire potential) + ... verification and validation activities including design verification testing, process and packaging validation and shelf-life studies. + Prepare product and process… more
    Kelly Services (12/16/25)
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  • Photonic Test Engineer

    Cisco (Carlsbad, CA)
    …our Carlsbad, CA office location. **Meet the Team** As a Photonic Test Engineer , you will play a critical role in developing/supporting the next generation component ... and packaging platform for Cisco's Silicon Photonics Integrated Circuits and chipsets. As a key member of the platform development team that is responsible for… more
    Cisco (12/16/25)
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  • Engineer V

    General Atomics (Poway, CA)
    …the aircraft itself. **DUTIES AND RESPONSIBILITIES** + Be responsible for the packaging design of airborne electronics. + Ensure that the electronics will survive ... No **Pay Range High:** 189,545 **Recruitment Posting Title:** Mechanical Design Engineer **Job Qualifications:** + Typically requires a bachelor's degree, master's… more
    General Atomics (12/11/25)
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  • Radio Frequency (RF) Design Engineer

    Silvus Technologies (San Diego, CA)
    …experience. + Good working knowledge of RF board layout, fabrication, and packaging . + Hands-on experience with solving EMI, harmonics, spurious, and stability ... issues. + Experience using RF simulation tools (ie AWR Microwave Office, Altium). + **Must be a US Person** (permanent resident or citizen) due to US government contracts. + **Employment is contingent upon the successful clearance of a background check.**… more
    Silvus Technologies (12/06/25)
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  • Staff Design Verification Engineer

    Insight Global (Irvine, CA)
    …reflect design intent. This is a highly visible, high-impact position for an engineer who thrives in regulated environments and enjoys both leading and being ... with wearable, implantable, or drug-delivery devices. - Exposure to biocompatibility, packaging validation, or sterilization testing. - Background or coursework in… more
    Insight Global (12/05/25)
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  • Senior Engineer , Front End Computer Aided…

    Microsoft Corporation (Mountain View, CA)
    …can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the development and adoption of cutting-edge SoC and IP ... areas: - Design compile, elaboration and filelist/libraries handling. - Design release packaging and qualification, RTL quality flows, static checks. Microsoft is an… more
    Microsoft Corporation (12/03/25)
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  • Mechanical Engineer , Cooling System,…

    Google (San Francisco, CA)
    Mechanical Engineer , Cooling System, Google Data Centers _corporate_fare_ Google _place_ Austin, TX, USA; Kirkland, WA, USA; +5 more; +4 more **Advanced** Experience ... seamless integration into accelerator designs, leveraging expertise in silicon packaging architectures. + Conduct detailed Computational Fluid Dynamics (CFD) and… more
    Google (11/27/25)
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  • Memory Innovation Engineer , AI and Machine…

    Micron Technology, Inc. (San Jose, CA)
    …technologies and guide strategic investments. We are seeking a Memory Innovation Engineer to perform research for CMBU, focusing on advanced memory architectures as ... Architecture or systems design with a focus on (GPU, CPU, ASIC, chiplet, packaging , datacenter systems). + Ability to analyze complex memory and AI performance… more
    Micron Technology, Inc. (11/15/25)
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  • Yield and Integration Engineer

    Teledyne (Goleta, CA)
    …etc.)_ + _Vacuum technology and equipment_ + _Infrared Imaging_ + _Hermetic packaging (solder, seam seal, wirebond, WLP, die attach, leak testing, etc.)_ Required: ... science, MS preferred + 2+ years as a Process, Design, Quality or Manufacturing Engineer + Ability to work in cleanroom environment. **_Applicants must be either a… more
    Teledyne (11/14/25)
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