• Principal UVM Digital Verification Engineer

    Draper (Boston, MA)
    …buses + Work in both block-level/chip-level UVM testbench environment + Work with RTL designers to resolve simulation issues + Implement cover groups according to ... design requirements + Work on code and functional coverage closures to achieve 100% + Perform code reviews and to mentor junior engineers in the group Applicants selected for this position will be required to obtain and maintain a government security… more
    Draper (06/21/25)
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  • Senior ASIC Verification Engineer - HSIO

    NVIDIA (Westford, MA)
    …infrastructure required to ensure design correctness. + Work closely with architects, RTL designers, and pre- and post-silicon teams to drive end-to-end verification ... and silicon readiness. + Debug functional failures and optimize verification flows to improve productivity and coverage. What We Need to See: + Bachelors or Masters Degree (or equivalent experience) with 8+ years of relevant experience + Strong background in… more
    NVIDIA (06/13/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Westford, MA)
    …targets. + Help in driving frontend and backend implementation from RTL to gds2, including synthesis, equivalence checking, floor-planning, timing constraints, ... timing and power convergence, and ECO implementation. What we need to see: + Great teammate + BS (or equivalent experience) in Electrical or Computer Engineering + 8+ years experience or MS (or equivalent experience) with 2 years experience in Synthesis and… more
    NVIDIA (05/14/25)
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