• Sr. DSP Engineer (Starshield)

    SpaceX (Hawthorne, CA)
    …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay Range: DSP Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and ... Sr. DSP Engineer (Starshield) Hawthorne, CA Apply SpaceX was...Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for… more
    SpaceX (08/13/25)
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  • Senior System Software Engineer - Computer…

    NVIDIA (Santa Clara, CA)
    …change the world and would love for you to join us. We are seeking a senior system software engineer to design and code computer vision software and help create the ... optimized computer vision, signal processing and machine learning algorithms for specialized DSP hardware. You will also help other internal and external customers… more
    NVIDIA (09/11/25)
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  • Senior ASIC Verification Engineer

    Tarana Wireless (Milpitas, CA)
    …you will make such an impact on our products. We are looking for a Senior ASIC Verification Engineer that is self driven however knows when to collaborate to solve ... be doing: + Work with some of the best DSP , system, and software engineers to define verification strategies...knowledge and strong experience of System Verilog, UVM, and C / C + + + Experience with building abstraction… more
    Tarana Wireless (09/25/25)
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  • Senior Design Verification Engineer, HW…

    Amazon (Sunnyvale, CA)
    …that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We ... verification environments using SystemVerilog and UVM Write tests in C to run out of the CPU Identify and...Engineering, or related field Experience with ARM and various DSP ISA Experience with CPU block level testing Experience… more
    Amazon (09/04/25)
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  • ASIC and/or FPGA Design & Verification Engineer…

    The Boeing Company (Huntington Beach, CA)
    …every teammate that's welcoming, respectful and inclusive, with great opportunity for professional growth. Find your future with us. Boeing Space, Intelligence & ... multiple **ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or Principal)** to join us as part of...using the latest ARM IP to enable high-integrity, low SWAP- C flight computers. And we're applying the latest digital… more
    The Boeing Company (10/04/25)
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  • Senior ASIC Design Engineer, Project Kuiper

    Amazon (San Diego, CA)
    …wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies. In this role you will: ... level verification using test benches constructed using UVM, System C and DPI- C . Ensure that the...laws and Company policies. Criminal history may have a direct , adverse, and negative relationship with some of the… more
    Amazon (10/08/25)
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  • Senior Hardware Engineer - Micro-Architect

    quadric.io, Inc (Burlingame, CA)
    …of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C ++ DSP and control code. Role: This is a rare opportunity to get in ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...low power digital design + Knowledge of VCS & Verilog/ C Co-Sim + Experience in data-parallel hardware design for… more
    quadric.io, Inc (09/08/25)
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  • Senior High Speed SerDes Validation…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Validation Engineer in the DGX Server Product Engineering Team. In this role you will be working with a team of HW/SW engineers to ... and above) is a must. + Strong understanding of DSP -based high-speed SERDES architectures. + Coding experience with programming...Coding experience with programming and scripting languages such as C / C ++, JS and Python. Ways to stand… more
    NVIDIA (08/21/25)
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  • Senior Design Verification Engineer

    quadric.io, Inc (Burlingame, CA)
    …of a machine learning graph, the Quadric GPNPU executes both NN graph code and conventional C ++ DSP and control code. If making an impact and having a seat at ... commercial VIPs and/or internal SW utilities + Develop directed/random drivers, assembly or C ++ programs to efficiently test the design + Use coverage metrics to… more
    quadric.io, Inc (09/08/25)
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  • Senior FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …For: + Experience with wireless PHY layer design (eg, modulation/demodulation) + Implementation of DSP and arithmetic algorithms in an FPGA + Familiarity with C ... or MATLAB programming What we offer: We don't just build next-gen wireless technology - we build people. The salary range for this position is: $130,000 to 175,000 Compensation will be determined based on several factors including, but not limited to: skill… more
    Tarana Wireless (08/22/25)
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