• RF SoC , Mixed-Signal & High Speed Digital…

    The Boeing Company (El Segundo, CA)
    …in RF/mixed signal design verification and product screening at SoC /SiP package level . + Project management experience with effective communication ... us. Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for **RF SoC , Mixed-Signal & High Speed Digital Design Engineer (Lead or Senior)**… more
    The Boeing Company (08/08/25)
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  • Sr. SoC Design - EM/IR, Hardware…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design - EM/IR Engineer to continue to innovate on behalf of our ... and IR analysis for Power Delivery Network and Standard Cell design . * Conduct detailed analysis of the PDN at Chip Top and block level to find and address… more
    Amazon (07/24/25)
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  • Senior Product Manager, Tensor SoC

    Google (San Diego, CA)
    …to advanced technologies and supply chain. + Understanding of embedded device design , both software and hardware, including system architecture, and Android OS. + ... team works closely with creative engineers, designers, marketers, etc. to help design and develop technologies that improve access to the world's information. We're… more
    Google (08/08/25)
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  • Computer Architect/Embedded Computing Systems…

    The Boeing Company (El Segundo, CA)
    …verification, and delivery of developmental aerospace computing hardware, demonstrating a high level of design creativity and positive impact; applying expertise ... in FPGA/ SoC /processor-based design and development, high-speed memory systems, communication interfaces, and radiation-hardening techniques, to design new… more
    The Boeing Company (08/02/25)
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  • Technical Leader ASIC Design - Prototyping

    Cisco (San Jose, CA)
    …and supporting our prototyping methodology + Option to engage in block- level RTL design or block or top - level IP integration + Collaborate with Software, ... Technical Leader with primary focus on FPGA Prototyping + Map multi-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds,… more
    Cisco (06/25/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    …7+ years of experience as a Digital Design Engineer 9. Experience with top level integration using automation tools. 10. Experience in RTL coding, synthesis ... Digital Design Engineer Responsibilities: 1. Responsible for top - level or block level uArchitecture...and/or SoC Integration. 11. Experience in digital design more
    Meta (08/01/25)
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  • Senior Verification Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …C/C++ is essential. + Be familiar with hierarchical design approach, top -down design , SoC and system level verification. + Candidates will be working ... Accelerated UVM Testbenches). + Bring up SOCs on emulation, root causing SoC /Processor test fails and emulator environment issues. + We have continual collaboration… more
    NVIDIA (07/29/25)
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  • Design Verification Engineer - Machine…

    Meta (Sunnyvale, CA)
    …and C/C++ based verification 10. 8+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... 6. Support hand-off and integration of developed subsystems/IP blocks into larger SOC environments 7. Develop and drive continuous Design Verification… more
    Meta (08/01/25)
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  • Sr. RTL Design Engineer, Hardware Compute…

    Amazon (Sunnyvale, CA)
    …buses like AMBA AXI4 - Experience in integrating third party IP blocks, building top level modules, defining clock domains and power domains - Large breadth ... in consumer devices. They should be familiar with modern SoC architectures, various interconnect topologies such as AMBA AXI,...with ARM and various DSP ISA - Experience debugging system- level issues - Experience in entire design more
    Amazon (06/20/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …verification and UVM methodology 10. 2+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies 11. ... to validate new core IP or System on Chip ( SoC ) implementations. You will work closely with researchers, architects...track detailed test plans for the different modules and top levels 3. Drive Design Verification to… more
    Meta (08/01/25)
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