• Principal/ Senior Principal ASIC DFT…

    Northrop Grumman (Linthicum Heights, MD)
    …to obtain and maintain an active clearance.** **Roles and Responsibilities:** + Responsible for DFT ( Design for Testabilty) aspects of ASIC Design thorough ... and Static Timing Analysis would be a plus + Active Clearance or higher ** Senior Principal Engineer Basic Qualifications:** + Bachelor's degree with 8 years of… more
    Northrop Grumman (11/21/25)
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  • Principal/ Senior Principal Digital ASIC…

    Northrop Grumman (Annapolis Junction, MD)
    …Design Constraints) **Basic Qualifications for Sr . Principal Digital ASIC Circuit Design Engineer Level:** + Bachelor's degree in a technical area (BSEE ... to the warfighter. We are seeking a front-end ASIC design engineer for design and...(RTL coding, simulation, synthesis, static timing analysis, logic equivalence, DFT insertion) + Proficiency with current ASIC design… more
    Northrop Grumman (11/26/25)
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  • Senior Staff ASIC Physical Design…

    Northrop Grumman (Annapolis Junction, MD)
    …be a part of our mission! Northrop Grumman Mission Systems (NGMS) is seeking a Sr . Staff ASIC Physical Design Engineer to support our growing engineering ... chartered with providing the skills, innovative technologies to develop, design , produce and sustain optimized product lines across the...such as Tcl, Python or Perl + Knowledge of DFT , including scan insertion and ATP + Effective communication… more
    Northrop Grumman (10/17/25)
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  • Principal / Senior Principal…

    Northrop Grumman (Linthicum Heights, MD)
    …others. \#NGATL This requisition may be filled as a Principal Research & Development Engineer or Senior Principal Research & Development Engineer **Basic ... be able to obtain and maintain a Secret clearance. **Basic Qualifications for Senior Principal Research & Development Engineer :** * Bachelor's Degree in Physics,… more
    Northrop Grumman (11/21/25)
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  • Senior Principal ASIC Static Timing…

    Northrop Grumman (Linthicum Heights, MD)
    …or Computer Engineering + Knowledge of Synthesis, Place & Route (P&R), and Design -for-Test ( DFT ) methodologies + Active DoD Secret Clearance or higher + ... Systems, Digital Technologies Group, is seeking a Static Timing Engineer to join our team of highly qualified, diverse...propose changes to fix them + Work closely with design , verification, design -for-test and physical design… more
    Northrop Grumman (11/13/25)
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