• Sr . SOC / ASIC Physical…

    SpaceX (Sunnyvale, CA)
    Sr . SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . SOC / ASIC PHYSICAL DESIGN ENGINEER...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
    SpaceX (06/19/25)
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  • Sr . ASIC Design Engineer,…

    Amazon (Cupertino, CA)
    …trade-offs. Key job responsibilities - integrate multiple subsystems into top level SOC , ensure correct clock/reset/functional/ DFT signal routing - As a key ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (05/23/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation SoC products....verification of DFT IPs for our next-generation SoC products. You'll help drive innovation across the full… more
    NVIDIA (05/22/25)
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  • Sr . SOC Design - STA, Hardware…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Senior SoC Design-STA Engineer to continue to innovate on behalf of our customers. ... STA, Crosstalk Delay and Crosstalk Noise analysis for digital ASIC /SoCs. * Full chip timing constraints development, full chip...timing signoff flow. * Work for Systems and Architecture, SoC Integration, Verification, DFT , Mixed Signal, IP… more
    Amazon (07/09/25)
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  • Sr SOC Physical Design Engineer,…

    Amazon (Sunnyvale, CA)
    …Edge that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our customers. We are ... Qualifications - BS in EE/CS - 7+ years in ASIC Physical Design from RTL-to-GDSII in FINFET technologies such...parameters, QOR metrics, and analyzing trends - Experience with DFT & DFM flows - Ability to provide mentorship,… more
    Amazon (06/05/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... high-quality clocking and reset logic to various units in SOC and GPU ASIC . The complexity of...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
    NVIDIA (06/24/25)
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  • Senior ASIC Design Engineer…

    NVIDIA (Santa Clara, CA)
    …Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved in end-to-end ... today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
    NVIDIA (07/29/25)
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  • Sr . Silicon Validation Engineer, DVT…

    Amazon (San Diego, CA)
    …motivated and experienced Post-Silicon Verification Engineer with strong expertise in Digital ASIC and modem (PHY and MAC layer) verification to join our silicon ... engineering team. The ideal candidate will work on validating complex SoC designs and wireless modem subsystems in a post-silicon lab environment, ensuring high… more
    Amazon (06/08/25)
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  • Senior Product Test Engineer

    Cisco (San Jose, CA)
    …to optimize test efficiency and drive yield improvements. Collaborate with Design, SoC , DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to ... Senior Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444763) + Location:San...As part of the team you will collaborate with ASIC design teams in the Central Hardware Group, peer… more
    Cisco (07/11/25)
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